rename CFG_ macros to CONFIG_SYS

[platform/kernel/u-boot.git] / post / cpu / ppc4xx / cache_4xx.S

diff --git a/post/cpu/ppc4xx/cache_4xx.S b/post/cpu/ppc4xx/cache_4xx.S
index 455ffa0..3f3e585 100644 (file)
--- a/post/cpu/ppc4xx/cache_4xx.S
+++ b/post/cpu/ppc4xx/cache_4xx.S
@@ -31,7 +31,7 @@
 #include <asm/cache.h>
 #include <asm/mmu.h>
 
-#if CONFIG_POST & CFG_POST_CACHE
+#if CONFIG_POST & CONFIG_SYS_POST_CACHE
 
        .text
 
@@ -115,8 +115,8 @@ cache_post_wb:
  */
 cache_post_dinvalidate:
        dcbi    r0, r3
-       addi    r3, r3, CFG_CACHELINE_SIZE
-       subic.  r4, r4, CFG_CACHELINE_SIZE
+       addi    r3, r3, CONFIG_SYS_CACHELINE_SIZE
+       subic.  r4, r4, CONFIG_SYS_CACHELINE_SIZE
        bgt     cache_post_dinvalidate
        sync
        blr
@@ -125,8 +125,8 @@ cache_post_dinvalidate:
  */
 cache_post_dstore:
        dcbst   r0, r3
-       addi    r3, r3, CFG_CACHELINE_SIZE
-       subic.  r4, r4, CFG_CACHELINE_SIZE
+       addi    r3, r3, CONFIG_SYS_CACHELINE_SIZE
+       subic.  r4, r4, CONFIG_SYS_CACHELINE_SIZE
        bgt     cache_post_dstore
        sync
        blr
@@ -135,8 +135,8 @@ cache_post_dstore:
  */
 cache_post_dtouch:
        dcbt    r0, r3
-       addi    r3, r3, CFG_CACHELINE_SIZE
-       subic.  r4, r4, CFG_CACHELINE_SIZE
+       addi    r3, r3, CONFIG_SYS_CACHELINE_SIZE
+       subic.  r4, r4, CONFIG_SYS_CACHELINE_SIZE
        bgt     cache_post_dtouch
        sync
        blr
@@ -486,4 +486,4 @@ cache_post_test_inst:
        li      r3, -1
        blr
 
-#endif /* CONFIG_POST & CFG_POST_CACHE */
+#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */