Merge branch 'next' of /home/wd/git/u-boot/next

[platform/kernel/u-boot.git] / include / configs / zeus.h

diff --git a/include/configs/zeus.h b/include/configs/zeus.h
index 29ada9e..aa250cc 100644 (file)
--- a/include/configs/zeus.h
+++ b/include/configs/zeus.h
@@ -122,14 +122,18 @@
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX      1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE    1
+#define CONFIG_SYS_NS16550_CLK         get_serial_clock()
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK                     /* external serial clock */
-#define CONFIG_SYS_BASE_BAUD           691200
+#define CONFIG_SYS_BASE_BAUD   691200
 #define CONFIG_BAUDRATE                115200
 #define CONFIG_SERIAL_MULTI
 
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE      \
-       {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+#define CONFIG_SYS_BAUDRATE_TABLE  \
+    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 
 /*-----------------------------------------------------------------------
  * Miscellaneous configurable options
@@ -280,12 +284,12 @@
  * GPIO0[28-29] - UART1 data signal input/output
  * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
  */
-#define CONFIG_SYS_GPIO0_OSRH          0x15555550      /* Chip selects */
-#define CONFIG_SYS_GPIO0_OSRL          0x00000110      /* UART_DTR-pin 27 alt out */
-#define CONFIG_SYS_GPIO0_ISR1H         0x10000041      /* Pin 2, 12 is input */
-#define CONFIG_SYS_GPIO0_ISR1L         0x15505440      /* OUT: LEDs 22/23; IN: pin12,2, NVALID# */
-#define CONFIG_SYS_GPIO0_TSRH          0x00000000
+#define CONFIG_SYS_GPIO0_OSRL          0x15555550      /* Chip selects */
+#define CONFIG_SYS_GPIO0_OSRH          0x00000110      /* UART_DTR-pin 27 alt out */
+#define CONFIG_SYS_GPIO0_ISR1L         0x10000041      /* Pin 2, 12 is input */
+#define CONFIG_SYS_GPIO0_ISR1H         0x15505440      /* OUT: LEDs 22/23; IN: pin12,2, NVALID# */
 #define CONFIG_SYS_GPIO0_TSRL          0x00000000
+#define CONFIG_SYS_GPIO0_TSRH          0x00000000
 #define CONFIG_SYS_GPIO0_TCR           0xBFF68317      /* 3-state OUT: 22/23/29; 12,2 is not 3-state */
 #define CONFIG_SYS_GPIO0_ODR           0x00000000