/* Environment in SPI NOR flash */
-#define CONFIG_PHY_MARVELL /* there is a marvell phy */
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
/* PCIe support */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
-#define CONFIG_LZO
#define CONFIG_CMD_MTDPARTS
#define CONFIG_SYS_MALLOC_LEN (4 << 20)
*/
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
-#define CONFIG_SYS_ALT_MEMTEST
-
/* Keep device tree and initrd in low memory so the kernel can access them */
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x10000000\0" \