Prepare v2023.10

[platform/kernel/u-boot.git] / include / configs / ti_omap3_common.h

diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 80d2a01..36a05b6 100644 (file)
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -26,15 +26,15 @@
 
 /* NS16550 Configuration */
 #define V_NS16550_CLK                  48000000        /* 48MHz (APLL96/2) */
-#define CONFIG_SYS_NS16550_CLK         V_NS16550_CLK
-#define CONFIG_SYS_BAUDRATE_TABLE      {4800, 9600, 19200, 38400, 57600, \
+#define CFG_SYS_NS16550_CLK            V_NS16550_CLK
+#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
                                        115200}
 
 /* Select serial console configuration */
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_NS16550_COM1                OMAP34XX_UART1
-#define CONFIG_SYS_NS16550_COM2                OMAP34XX_UART2
-#define CONFIG_SYS_NS16550_COM3                OMAP34XX_UART3
+#define CFG_SYS_NS16550_COM1           OMAP34XX_UART1
+#define CFG_SYS_NS16550_COM2           OMAP34XX_UART2
+#define CFG_SYS_NS16550_COM3           OMAP34XX_UART3
 #endif
 
 /* Physical Memory Map */
@@ -46,7 +46,7 @@
  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  * This rate is divided by a local divisor.
  */
-#define CONFIG_SYS_TIMERBASE           (OMAP34XX_GPT2)
+#define CFG_SYS_TIMERBASE              (OMAP34XX_GPT2)
 
 /* SPL */