Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h

[platform/kernel/u-boot.git] / include / configs / taurus.h

diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index fdd1c52..238074b 100644 (file)
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -33,16 +33,6 @@
 #define CONFIG_SYS_AT91_MAIN_CLOCK     18432000        /* main clock xtal */
 
 /* Misc CPU related */
-#define CONFIG_CMDLINE_TAG             /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
-
-/* general purpose I/O */
-#define CONFIG_ATMEL_LEGACY            /* required until (g)pio is fixed */
-#define CONFIG_AT91_GPIO
-#define CONFIG_AT91_GPIO_PULLUP        1       /* keep pullups on peripheral pins */
 
 #define CONFIG_USART_BASE              ATMEL_BASE_DBGU
 #define CONFIG_USART_ID                        ATMEL_ID_SYS
@@ -59,8 +49,8 @@
  * leaving the correct space for initial global data structure above
  * that address while providing maximum stack area below.
  */
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000
+#define CONFIG_SYS_INIT_RAM_ADDR       ATMEL_BASE_SRAM1
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
@@ -73,11 +63,6 @@
 #define CONFIG_SYS_NAND_READY_PIN      AT91_PIN_PC13
 #endif
 
-/* Ethernet */
-#define CONFIG_MACB
-#define CONFIG_RMII
-#define CONFIG_AT91_WANTS_COMMON_PHY
-
 /* USB */
 #if defined(CONFIG_BOARD_TAURUS)
 #define CONFIG_USB_ATMEL
@@ -93,7 +78,6 @@
 #define CONFIG_USB_GADGET_AT91
 
 /* DFU class support */
-#define CONFIG_SYS_DFU_DATA_BUF_SIZE   (SZ_1M)
 #define DFU_MANIFEST_POLL_TIMEOUT      25000
 #endif
 
@@ -104,11 +88,7 @@
 /* SPL related */
 #endif
 
-/* load address */
-#define CONFIG_SYS_LOAD_ADDR                   0x22000000
-
 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
-#define CONFIG_ENV_OFFSET_REDUND       0x180000
 
 #ifndef CONFIG_SPL_BUILD
 #if defined(CONFIG_BOARD_AXM)
@@ -160,49 +140,27 @@
        "upgrade_available=0\0"
 #endif
 #endif /* #ifndef CONFIG_SPL_BUILD */
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN \
-       ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
 
 /* Defines for SPL */
-#define CONFIG_SPL_MAX_SIZE            (31 * SZ_512)
 #define        CONFIG_SPL_STACK                (ATMEL_BASE_SRAM1 + SZ_16K)
 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
                                        CONFIG_SYS_MALLOC_LEN)
 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
 
 #define CONFIG_SPL_BSS_START_ADDR      CONFIG_SPL_MAX_SIZE
-#define CONFIG_SPL_BSS_MAX_SIZE                (3 * SZ_512)
 
 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
-#define CONFIG_SYS_USE_NANDFLASH       1
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SPL_NAND_RAW_ONLY
-#define CONFIG_SPL_NAND_SOFTECC
-#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x20000
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    SZ_512K
 #define        CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 
 #define CONFIG_SYS_NAND_SIZE           (256 * SZ_1M)
-#define CONFIG_SYS_NAND_PAGE_SIZE      SZ_2K
-#define CONFIG_SYS_NAND_BLOCK_SIZE     (SZ_128K)
-#define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
-                                        CONFIG_SYS_NAND_PAGE_SIZE)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS  NAND_LARGE_BADBLOCK_POS
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_OOBSIZE                64
 #define CONFIG_SYS_NAND_ECCPOS         { 40, 41, 42, 43, 44, 45, 46, 47, \
                                          48, 49, 50, 51, 52, 53, 54, 55, \
                                          56, 57, 58, 59, 60, 61, 62, 63, }
 
-#define CONFIG_SPL_ATMEL_SIZE
 #define CONFIG_SYS_MASTER_CLOCK                132096000
 #define AT91_PLL_LOCK_TIMEOUT          1000000
 #define CONFIG_SYS_AT91_PLLA           0x202A3F01
@@ -210,7 +168,6 @@
 #define CONFIG_SYS_MCKR_CSS            (0x02 | CONFIG_SYS_MCKR)
 #define CONFIG_SYS_AT91_PLLB           0x10193F05
 
-#define CONFIG_SPL_PAD_TO              CONFIG_SYS_NAND_U_BOOT_OFFS
 #define CONFIG_SYS_SPL_LEN             CONFIG_SPL_PAD_TO
 
 #endif