/* SPL support */
#ifdef CONFIG_SPL
/* SPL use DDR */
-#define CONFIG_SYS_SPL_MALLOC_START 0xC0300000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x01D00000
/* Restrict SPL to fit within SYSRAM */
#define STM32_SYSRAM_END (STM32_SYSRAM_BASE + STM32_SYSRAM_SIZE)