ppc4xx: Remove cache definition from 4xx board config files

[platform/kernel/u-boot.git] / include / configs / sbc405.h

diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h
index dc906b1..60d401f 100644 (file)
--- a/include/configs/sbc405.h
+++ b/include/configs/sbc405.h
@@ -234,16 +234,6 @@
 #define CFG_ENV_SIZE           0x40000 /* Total Size of Environment Sector     */
 
 /*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE                16384   /* For AMCC 405 CPUs, older 405 ppc's   */
-                                       /* have only 8kB, 16kB is save here     */
-#define CFG_CACHELINE_SIZE     32      /* ...                                  */
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT    5       /* log base 2 of the above value        */
-#endif
-
-/*-----------------------------------------------------------------------
  * External Bus Controller (EBC) Setup
  */
 #define FLASH0_BA      CFG_FLASH_BASE          /* FLASH 0 Base Address         */