global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_*

[platform/kernel/u-boot.git] / include / configs / p1_p2_rdb_pc.h

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 778bf51..38f360b 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -98,13 +98,13 @@
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS       CONFIG_SPL_PAD_TO
 #elif defined(CONFIG_MTD_RAW_NAND)
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    (832 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST     (0x11000000)
-#define CONFIG_SYS_NAND_U_BOOT_START   (0x11000000)
+#define CFG_SYS_NAND_U_BOOT_SIZE       (832 << 10)
+#define CFG_SYS_NAND_U_BOOT_DST        (0x11000000)
+#define CFG_SYS_NAND_U_BOOT_START      (0x11000000)
 #elif defined(CONFIG_SPL_BUILD)
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    (128 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST     0xf8f80000
-#define CONFIG_SYS_NAND_U_BOOT_START   0xf8f80000
+#define CFG_SYS_NAND_U_BOOT_SIZE       (128 << 10)
+#define CFG_SYS_NAND_U_BOOT_DST        0xf8f80000
+#define CFG_SYS_NAND_U_BOOT_START      0xf8f80000
 #endif /* not CONFIG_TPL_BUILD */
 #endif
 
@@ -207,22 +207,22 @@
 
 /* Nand Flash */
 #ifdef CONFIG_NAND_FSL_ELBC
-#define CONFIG_SYS_NAND_BASE           0xff800000
+#define CFG_SYS_NAND_BASE              0xff800000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_NAND_BASE_PHYS      0xfff800000ull
+#define CFG_SYS_NAND_BASE_PHYS 0xfff800000ull
 #else
-#define CONFIG_SYS_NAND_BASE_PHYS      CONFIG_SYS_NAND_BASE
+#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE
 #endif
 
-#define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
+#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE }
 
-#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
+#define CFG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \
        | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
        | BR_PS_8       /* Port Size = 8 bit */ \
        | BR_MS_FCM     /* MSEL = FCM */ \
        | BR_V) /* valid */
 #if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_SYS_NAND_OR_PRELIM      (OR_AM_32KB \
+#define CFG_SYS_NAND_OR_PRELIM (OR_AM_32KB \
        | OR_FCM_PGS    /* Large Page*/ \
        | OR_FCM_CSCT \
        | OR_FCM_CST \
@@ -231,7 +231,7 @@
        | OR_FCM_TRLX \
        | OR_FCM_EHTR)
 #else
-#define CONFIG_SYS_NAND_OR_PRELIM      (OR_AM_32KB     /* small page */ \
+#define CFG_SYS_NAND_OR_PRELIM (OR_AM_32KB     /* small page */ \
        | OR_FCM_CSCT \
        | OR_FCM_CST \
        | OR_FCM_CHT \