Prepare v2023.10

[platform/kernel/u-boot.git] / include / configs / mx6slevk.h

diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index cd9f0b0..39c8ef0 100644 (file)
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
  *
  * Configuration settings for the Freescale i.MX6SL EVK board.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -11,37 +10,12 @@
 
 #include "mx6_common.h"
 
-#ifdef CONFIG_SPL
-#include "imx6_spl.h"
-#endif
-
-#define CONFIG_MACH_TYPE               MACH_TYPE_MX6SL_EVK
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          (3 * SZ_1M)
-
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE           UART1_IPS_BASE_ADDR
+#define CFG_MXC_UART_BASE              UART1_IPS_BASE_ADDR
 
 /* MMC Configs */
-#define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC2_BASE_ADDR
-
-/* I2C Configs */
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED             100000
-
-#define CONFIG_FEC_MXC
-#define CONFIG_MII
-#define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RMII
-#define CONFIG_FEC_MXC_PHYADDR         0
-
-#define CONFIG_PHY_SMSC
+#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
 
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
        "script=boot.scr\0" \
        "image=zImage\0" \
        "console=ttymxc0\0" \
@@ -53,9 +27,9 @@
        "ip_dyn=yes\0" \
        "mmcdev=1\0" \
        "mmcpart=1\0" \
-       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
+       "finduuid=part uuid mmc 1:2 uuid\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
-               "root=${mmcroot}\0" \
+               "root=PARTUUID=${uuid} rootwait rw\0" \
        "loadbootscript=" \
                "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
        "bootscript=echo Running bootscript from mmc ...; " \
@@ -63,6 +37,7 @@
        "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
        "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
        "mmcboot=echo Booting from mmc ...; " \
+               "run finduuid; " \
                "run mmcargs; " \
                "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
                        "if run loadfdt; then " \
@@ -102,73 +77,23 @@
                        "bootz; " \
                "fi;\0"
 
-#define CONFIG_BOOTCOMMAND \
-          "mmc dev ${mmcdev};" \
-          "mmc dev ${mmcdev}; if mmc rescan; then " \
-                  "if run loadbootscript; then " \
-                          "run bootscript; " \
-                  "else " \
-                          "if run loadimage; then " \
-                                  "run mmcboot; " \
-                          "else run netboot; " \
-                          "fi; " \
-                  "fi; " \
-          "else run netboot; fi"
-
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START       0x80000000
-#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START + SZ_512M)
 
 /* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS           1
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 
-#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+#define CFG_SYS_SDRAM_BASE             PHYS_SDRAM
+#define CFG_SYS_INIT_RAM_ADDR  IRAM_BASE_ADDR
+#define CFG_SYS_INIT_RAM_SIZE  IRAM_SIZE
 
 /* Environment organization */
-#define CONFIG_ENV_SIZE                        SZ_8K
-
-#if defined CONFIG_SPI_BOOT
-#define CONFIG_ENV_OFFSET               (768 * 1024)
-#define CONFIG_ENV_SECT_SIZE            (64 * 1024)
-#define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
-#else
-#define CONFIG_ENV_OFFSET              (8 * SZ_64K)
-#endif
-
-#ifdef CONFIG_CMD_SF
-#define CONFIG_MXC_SPI
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
 
 /* USB Configs */
 #ifdef CONFIG_CMD_USB
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_MXC_USB_PORTSC          (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS           0
-#define CONFIG_USB_MAX_CONTROLLER_COUNT        2
-#endif
-
-#define CONFIG_SYS_FSL_USDHC_NUM       3
-#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV         1       /* SDHC2*/
+#define CFG_MXC_USB_PORTSC             (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CFG_MXC_USB_FLAGS              0
 #endif
 
-#define CONFIG_IMX_THERMAL
+#define CFG_SYS_FSL_USDHC_NUM  3
 
 #endif                         /* __CONFIG_H */