+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __MX6QSABRESD_CONFIG_H
-#define __MX6QSABRESD_CONFIG_H
+#ifndef __MX6SABRESD_CONFIG_H
+#define __MX6SABRESD_CONFIG_H
-#include <asm/arch/imx-regs.h>
-#include <asm/imx-common/gpio.h>
+#define CFG_MXC_UART_BASE UART1_BASE
+#define CONSOLE_DEV "ttymxc0"
-#define CONFIG_MACH_TYPE 3980
-#define CONFIG_MXC_UART_BASE UART1_BASE
-#define CONFIG_CONSOLE_DEV "ttymxc0"
-#define CONFIG_MMCROOT "/dev/mmcblk1p2"
-#if defined(CONFIG_MX6Q)
-#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
-#elif defined(CONFIG_MX6DL)
-#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb"
-#endif
-#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
+#include "mx6sabre_common.h"
-#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
+/* Falcon Mode */
-#include "mx6sabre_common.h"
+/* Falcon Mode - MMC support: args@1MB kernel@2MB */
-#define CONFIG_SYS_FSL_USDHC_NUM 3
-#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
-#endif
+#define CFG_SYS_FSL_USDHC_NUM 3
-#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
-#define CONFIG_PCI
-#define CONFIG_PCI_PNP
-#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_PCIE_IMX
-#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
-#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
+#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
+#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
#endif
-/* I2C Configs */
-#define CONFIG_CMD_I2C
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_SPEED 100000
-
-/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_PFUZE100
-#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
+/* USB Configs */
+#ifdef CONFIG_CMD_USB
+#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CFG_MXC_USB_FLAGS 0
+#endif
-#endif /* __MX6QSABRESD_CONFIG_H */
+#endif /* __MX6SABRESD_CONFIG_H */