#define CONFIG_XILINX_UARTLITE
#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
-#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE }
+#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#else
#ifdef XILINX_UART16550_BASEADDR
-#define CFG_NS16550
-#define CFG_NS16550_SERIAL
-#define CFG_NS16550_REG_SIZE 4
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 4
#define CONFIG_CONS_INDEX 1
-#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR
-#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ
+#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR
+#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
#define CONFIG_BAUDRATE 115200
-#define CFG_BAUDRATE_TABLE { 9600, 115200 }
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 }
#endif
#endif
/* setting reset address */
-/*#define CFG_RESET_ADDRESS TEXT_BASE*/
+/*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/
/* ethernet */
#ifdef XILINX_EMAC_BASEADDR
#define CONFIG_XILINX_EMAC 1
-#define CFG_ENET
+#define CONFIG_SYS_ENET
#else
#ifdef XILINX_EMACLITE_BASEADDR
#define CONFIG_XILINX_EMACLITE 1
-#define CFG_ENET
+#define CONFIG_SYS_ENET
#endif
#endif
#undef ET_DEBUG
/* gpio */
#ifdef XILINX_GPIO_BASEADDR
-#define CFG_GPIO_0 1
-#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR
+#define CONFIG_SYS_GPIO_0 1
+#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
#endif
/* interrupt controller */
#ifdef XILINX_INTC_BASEADDR
-#define CFG_INTC_0 1
-#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR
-#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
+#define CONFIG_SYS_INTC_0 1
+#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
+#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
#endif
/* timer */
#ifdef XILINX_TIMER_BASEADDR
#if (XILINX_TIMER_IRQ != -1)
-#define CFG_TIMER_0 1
-#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR
-#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ
+#define CONFIG_SYS_TIMER_0 1
+#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
+#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
#define FREQUENCE XILINX_CLOCK_FREQ
-#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 )
+#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
#endif
#else
#ifdef XILINX_CLOCK_FREQ
#endif
#endif
/* FSL */
-/* #define CFG_FSL_2 */
+/* #define CONFIG_SYS_FSL_2 */
/* #define FSL_INTR_2 1 */
/*
* memory layout - Example
* TEXT_BASE = 0x1200_0000;
- * CFG_SRAM_BASE = 0x1000_0000;
- * CFG_SRAM_SIZE = 0x0400_0000;
+ * CONFIG_SYS_SRAM_BASE = 0x1000_0000;
+ * CONFIG_SYS_SRAM_SIZE = 0x0400_0000;
*
- * CFG_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
- * CFG_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000
- * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000
+ * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
+ * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000
+ * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000
*
- * 0x1000_0000 CFG_SDRAM_BASE
+ * 0x1000_0000 CONFIG_SYS_SDRAM_BASE
* FREE
* 0x1200_0000 TEXT_BASE
* U-BOOT code
* FREE
*
* STACK
- * 0x13F7_F000 CFG_MALLOC_BASE
+ * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE
* MALLOC_AREA 256kB Alloc
- * 0x11FB_F000 CFG_MONITOR_BASE
+ * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE
* MONITOR_CODE 256kB Env
- * 0x13FF_F000 CFG_GBL_DATA_OFFSET
+ * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET
* GLOBAL_DATA 4kB bd, gd
- * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE
+ * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
*/
/* ddr sdram - main memory */
-#define CFG_SDRAM_BASE XILINX_RAM_START
-#define CFG_SDRAM_SIZE XILINX_RAM_SIZE
-#define CFG_MEMTEST_START CFG_SDRAM_BASE
-#define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000)
+#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
+#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
/* global pointer */
-#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */
+#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */
/* start of global data */
-#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
/* monitor code */
#define SIZE 0x40000
-#define CFG_MONITOR_LEN SIZE
-#define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN)
-#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
-#define CFG_MALLOC_LEN SIZE
-#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
+#define CONFIG_SYS_MONITOR_LEN SIZE
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_SYS_MALLOC_LEN SIZE
+#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
/* stack */
-#define CFG_INIT_SP_OFFSET CFG_MONITOR_BASE
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE
/*#define RAMENV */
#define FLASH
#ifdef FLASH
- #define CFG_FLASH_BASE XILINX_FLASH_START
- #define CFG_FLASH_SIZE XILINX_FLASH_SIZE
- #define CFG_FLASH_CFI 1
+ #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
+ #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
+ #define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
- #define CFG_FLASH_EMPTY_INFO 1 /* ?empty sector */
- #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
- #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
- #define CFG_FLASH_PROTECTION /* hardware flash protection */
+ #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */
+ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+ #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+ #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
#ifdef RAMENV
#define CONFIG_ENV_IS_NOWHERE 1
#define CONFIG_ENV_SIZE 0x1000
- #define CONFIG_ENV_ADDR (CFG_MONITOR_BASE - CONFIG_ENV_SIZE)
+ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
#else /* !RAMENV */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
- #define CONFIG_ENV_ADDR (CFG_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
+ #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
#define CONFIG_ENV_SIZE 0x40000
#endif /* !RAMBOOT */
#else /* !FLASH */
/* ENV in RAM */
- #define CFG_NO_FLASH 1
+ #define CONFIG_SYS_NO_FLASH 1
#define CONFIG_ENV_IS_NOWHERE 1
#define CONFIG_ENV_SIZE 0x1000
- #define CONFIG_ENV_ADDR (CFG_MONITOR_BASE - CONFIG_ENV_SIZE)
- #define CFG_FLASH_PROTECTION /* hardware flash protection */
+ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
+ #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
#endif /* !FLASH */
/* system ace */
#define CONFIG_SYSTEMACE
/* #define DEBUG_SYSTEMACE */
#define SYSTEMACE_CONFIG_FPGA
- #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
- #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
+ #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
+ #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
#define CONFIG_DOS_PARTITION
#endif
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MFSL
-#ifndef CFG_ENET
+#ifndef CONFIG_SYS_ENET
#undef CONFIG_CMD_NET
#else
#define CONFIG_CMD_PING
#endif
/* Miscellaneous configurable options */
-#define CFG_PROMPT "U-Boot-mONStR> "
-#define CFG_CBSIZE 512 /* size of console buffer */
-#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */
-#define CFG_MAXARGS 15 /* max number of command args */
-#define CFG_LONGHELP
-#define CFG_LOAD_ADDR 0x12000000 /* default load address */
+#define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
+#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
+#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */
#define CONFIG_BOOTDELAY 30
#define CONFIG_BOOTARGS "root=romfs"
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
/* architecture dependent code */
-#define CFG_USR_EXCEP /* user exception */
-#define CFG_HZ 1000
+#define CONFIG_SYS_USR_EXCEP /* user exception */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
projects / platform / kernel / u-boot.git / blobdiff