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Merge git://git.denx.de/u-boot-fsl-qoriq
[platform/kernel/u-boot.git] / include / configs / ls2080ardb.h
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 2e0d95e..2dab065 100644 (file)
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -1,4 +1,5 @@
 /*
+ * Copyright 2017 NXP
  * Copyright 2015 Freescale Semiconductor
  *
  * SPDX-License-Identifier:    GPL-2.0+
@@ -12,6 +13,14 @@
 #undef CONFIG_CONS_INDEX
 #define CONFIG_CONS_INDEX       2
 
+#ifdef CONFIG_FSL_QSPI
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_QIXIS_I2C_ACCESS
+#endif
+#define CONFIG_SYS_I2C_EARLY_INIT
+#define CONFIG_DISPLAY_BOARDINFO_LATE
+#endif
+
 #define I2C_MUX_CH_VOL_MONITOR         0xa
 #define I2C_VOL_MONITOR_ADDR           0x38
 #define CONFIG_VOL_MONITOR_IR36021_READ
@@ -69,6 +78,7 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_SCSI_MAX_DEVICE             (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
                                                CONFIG_SYS_SCSI_MAX_LUN)
 
+#ifndef CONFIG_FSL_QSPI
 /* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */
 
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
@@ -157,7 +167,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_CMD_NAND
 
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
-
 #define CONFIG_FSL_QIXIS       /* use common QIXIS code */
 #define QIXIS_LBMAP_SWITCH             0x06
 #define QIXIS_LBMAP_MASK               0x0f
@@ -242,7 +251,7 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NAND_FTIM3
 
 #define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x200000)
+#define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x300000)
 #define CONFIG_ENV_SECT_SIZE           0x20000
 #define CONFIG_ENV_SIZE                        0x2000
 #endif
@@ -250,12 +259,31 @@ unsigned long get_board_sys_clk(void);
 /* Debug Server firmware */
 #define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
 #define CONFIG_SYS_DEBUG_SERVER_FW_ADDR        0x580D00000ULL
-
+#endif
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
 
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_FSL_QIXIS       /* use common QIXIS code */
+#define QIXIS_QMAP_MASK                        0x07
+#define QIXIS_QMAP_SHIFT               5
+#define QIXIS_LBMAP_DFLTBANK           0x00
+#define QIXIS_LBMAP_QSPI               0x00
+#define QIXIS_RCW_SRC_QSPI             0x62
+#define QIXIS_LBMAP_ALTBANK            0x20
+#define QIXIS_RST_CTL_RESET            0x31
+#define QIXIS_RCFG_CTL_RECONFIG_IDLE   0x20
+#define QIXIS_RCFG_CTL_RECONFIG_START  0x21
+#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE  0x08
+#define QIXIS_LBMAP_MASK               0x0f
+#define QIXIS_RST_CTL_RESET_EN         0x30
+#endif
+
 /*
  * I2C
  */
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_SYS_I2C_FPGA_ADDR       0x66
+#endif
 #define I2C_MUX_PCA_ADDR               0x75
 #define I2C_MUX_PCA_ADDR_PRI           0x75 /* Primary Mux*/
 
@@ -263,18 +291,33 @@ unsigned long get_board_sys_clk(void);
 #define I2C_MUX_CH_DEFAULT      0x8
 
 /* SPI */
-#ifdef CONFIG_FSL_DSPI
+#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
 #define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_BAR
+#ifdef CONFIG_FSL_QSPI
 #define CONFIG_SPI_FLASH_STMICRO
 #endif
+#ifdef CONFIG_FSL_QSPI
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_SPI_FLASH_STMICRO
+#else
+#define CONFIG_SPI_FLASH_SPANSION
+#endif
+#define FSL_QSPI_FLASH_SIZE            SZ_64M  /* 64MB */
+#define FSL_QSPI_FLASH_NUM             2
+#endif
+#endif
 
 /*
  * RTC configuration
  */
 #define RTC
+#ifdef CONFIG_TARGET_LS2081ARDB
+#define CONFIG_RTC_PCF8563             1
+#define CONFIG_SYS_I2C_RTC_ADDR         0x51
+#else
 #define CONFIG_RTC_DS3231               1
 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
+#endif
 
 /* EEPROM */
 #define CONFIG_ID_EEPROM
@@ -334,15 +377,34 @@ unsigned long get_board_sys_clk(void);
        "ramdisk_size=0x2000000\0"              \
        "fdt_high=0xa0000000\0"                 \
        "initrd_high=0xffffffffffffffff\0"      \
-       "kernel_start=0x581100000\0"            \
+       "kernel_start=0x581000000\0"            \
        "kernel_load=0xa0000000\0"              \
        "kernel_size=0x2800000\0"               \
        "mcmemsize=0x40000000\0"                \
        "fdtfile=fsl-ls2080a-rdb.dtb\0"         \
-       "mcinitcmd=esbc_validate 0x580c80000;"  \
-       "esbc_validate 0x580cc0000;"            \
-       "fsl_mc start mc 0x580300000"           \
-       " 0x580800000 \0"                       \
+       "mcinitcmd=esbc_validate 0x580700000;"  \
+       "esbc_validate 0x580740000;"            \
+       "fsl_mc start mc 0x580a00000"           \
+       " 0x580e00000 \0"                       \
+       BOOTENV
+#else
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_EXTRA_ENV_SETTINGS              \
+       "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
+       "scriptaddr=0x80800000\0"               \
+       "kernel_addr_r=0x81000000\0"            \
+       "pxefile_addr_r=0x81000000\0"           \
+       "fdt_addr_r=0x88000000\0"               \
+       "ramdisk_addr_r=0x89000000\0"           \
+       "loadaddr=0x80100000\0"                 \
+       "kernel_addr=0x100000\0"                \
+       "ramdisk_size=0x2000000\0"              \
+       "fdt_high=0xa0000000\0"                 \
+       "initrd_high=0xffffffffffffffff\0"      \
+       "kernel_start=0x21000000\0"             \
+       "mcmemsize=0x40000000\0"                \
+       "mcinitcmd=fsl_mc start mc 0x20a00000" \
+       " 0x20e00000 \0"                       \
        BOOTENV
 #else
 #define CONFIG_EXTRA_ENV_SETTINGS              \
@@ -358,15 +420,16 @@ unsigned long get_board_sys_clk(void);
        "ramdisk_size=0x2000000\0"              \
        "fdt_high=0xa0000000\0"                 \
        "initrd_high=0xffffffffffffffff\0"      \
-       "kernel_start=0x581100000\0"            \
+       "kernel_start=0x581000000\0"            \
        "kernel_load=0xa0000000\0"              \
        "kernel_size=0x2800000\0"               \
        "mcmemsize=0x40000000\0"                \
        "fdtfile=fsl-ls2080a-rdb.dtb\0"         \
-       "mcinitcmd=fsl_mc start mc 0x580300000" \
-       " 0x580800000 \0"                       \
+       "mcinitcmd=fsl_mc start mc 0x580a00000" \
+       " 0x580e00000 \0"                       \
        BOOTENV
 #endif
+#endif
 
 
 #undef CONFIG_BOOTARGS
@@ -376,11 +439,18 @@ unsigned long get_board_sys_clk(void);
                                " hugepagesz=2m hugepages=256"
 
 #undef CONFIG_BOOTCOMMAND
+#ifdef CONFIG_QSPI_BOOT
+/* Try to boot an on-QSPI kernel first, then do normal distro boot */
+#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x20d00000" \
+                          " && bootm $kernel_start" \
+                          " || run distro_bootcmd"
+#else
 /* Try to boot an on-NOR kernel first, then do normal distro boot */
-#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580700000" \
+#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580d00000" \
                           " && cp.b $kernel_start $kernel_load $kernel_size" \
                           " && bootm $kernel_load" \
                           " || run distro_bootcmd"
+#endif
 
 /* MAC/PHY configuration */
 #ifdef CONFIG_FSL_MC_ENET
@@ -389,7 +459,11 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_PHY_CORTINA
 #define CONFIG_PHYLIB
 #define        CONFIG_SYS_CORTINA_FW_IN_NOR
-#define CONFIG_CORTINA_FW_ADDR         0x581000000
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_CORTINA_FW_ADDR         0x20980000
+#else
+#define CONFIG_CORTINA_FW_ADDR         0x580980000
+#endif
 #define CONFIG_CORTINA_FW_LENGTH       0x40000
 
 #define CORTINA_PHY_ADDR1      0x10
Domain: System / Kernel;