Convert CONFIG_CMD_ASKENV et al to Kconfig

[platform/kernel/u-boot.git] / include / configs / highbank.h

diff --git a/include/configs/highbank.h b/include/configs/highbank.h
index 785cad7..bdbaa47 100644 (file)
--- a/include/configs/highbank.h
+++ b/include/configs/highbank.h
@@ -1,14 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2010-2011 Calxeda, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_DCACHE_OFF
-
 #define CONFIG_SYS_BOOTMAPSZ           (16 << 20)
 
 #define CONFIG_SYS_TIMER_RATE          (150000000/256)
@@ -22,11 +19,9 @@
 
 #define CONFIG_PL011_CLOCK             150000000
 #define CONFIG_PL01x_PORTS             { (void *)(0xFFF36000) }
-#define CONFIG_CONS_INDEX              0
 
 #define CONFIG_SYS_BOOTCOUNT_LE                /* Use little-endian accessors */
 
-#define CONFIG_MISC_INIT_R
 #define CONFIG_SCSI_AHCI_PLAT
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID    5
 #define CONFIG_SYS_SCSI_MAX_LUN                1
@@ -35,10 +30,6 @@
 
 #define CONFIG_CALXEDA_XGMAC
 
-/*
- * Command line configuration.
- */
-
 #define CONFIG_BOOT_RETRY_TIME         -1
 #define CONFIG_RESET_TO_RETRY
 
@@ -55,17 +46,12 @@
  * Physical Memory Map
  * The DRAM is already setup, so do not touch the DT node later.
  */
-#define CONFIG_NR_DRAM_BANKS           0
 #define PHYS_SDRAM_1_SIZE              (4089 << 20)
-#define CONFIG_SYS_MEMTEST_START       0x100000
-#define CONFIG_SYS_MEMTEST_END         (PHYS_SDRAM_1_SIZE - 0x100000)
 
 /* Environment data setup
 */
 #define CONFIG_SYS_NVRAM_BASE_ADDR     0xfff88000      /* NVRAM base address */
 #define CONFIG_SYS_NVRAM_SIZE          0x8000          /* NVRAM size */
-#define CONFIG_ENV_SIZE                        0x2000          /* Size of Environ */
-#define CONFIG_ENV_ADDR                        CONFIG_SYS_NVRAM_BASE_ADDR
 
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_INIT_SP_ADDR                0x01000000