Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
[platform/kernel/u-boot.git] / include / configs / VCMA9.h
index 7edea6a..6051480 100644 (file)
 
 #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
 
-/*-----------------------------------------------------------------------
- * NAND flash settings
- */
-#if defined(CONFIG_CMD_NAND)
-
-#define CONFIG_NAND_LEGACY
-#define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND devices           */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN    0x00
-#define NAND_MAX_FLOORS 1
-
-#define NAND_WAIT_READY(nand)  NF_WaitRB()
-
-#define NAND_DISABLE_CE(nand)  NF_SetCE(NFCE_HIGH)
-#define NAND_ENABLE_CE(nand)   NF_SetCE(NFCE_LOW)
-
-
-#define WRITE_NAND_COMMAND(d, adr)     NF_Cmd(d)
-#define WRITE_NAND_COMMANDW(d, adr)    NF_CmdW(d)
-#define WRITE_NAND_ADDRESS(d, adr)     NF_Addr(d)
-#define WRITE_NAND(d, adr)             NF_Write(d)
-#define READ_NAND(adr)                 NF_Read()
-/* the following functions are NOP's because S3C24X0 handles this in hardware */
-#define NAND_CTL_CLRALE(nandptr)
-#define NAND_CTL_SETALE(nandptr)
-#define NAND_CTL_CLRCLE(nandptr)
-#define NAND_CTL_SETCLE(nandptr)
-
-#define CONFIG_MTD_NAND_VERIFY_WRITE   1
-#define CONFIG_MTD_NAND_ECC_JFFS2      1
-
-#endif
-
 #endif /* __CONFIG_H */