Prepare v2023.10

[platform/kernel/u-boot.git] / include / configs / T208xRDB.h

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index d6dd9c0..0b9dde3 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020-2021 NXP
+ * Copyright 2020-2023 NXP
  */
 
 /*
@@ -13,7 +13,7 @@
 
 #include <linux/stringify.h>
 
-#define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
+#define CFG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
 
 /* High Level Configuration Options */
 
@@ -30,7 +30,7 @@
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
+#define        CFG_RESET_VECTOR_ADDRESS             0x200FFC
 #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
 #define CFG_SYS_SPI_FLASH_U_BOOT_DST                (0x00200000)
 #define CFG_SYS_SPI_FLASH_U_BOOT_START      (0x00200000)
@@ -38,7 +38,7 @@
 #endif
 
 #ifdef CONFIG_SDCARD
-#define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
+#define        CFG_RESET_VECTOR_ADDRESS             0x200FFC
 #define CFG_SYS_MMC_U_BOOT_SIZE     (768 << 10)
 #define CFG_SYS_MMC_U_BOOT_DST      (0x00200000)
 #define CFG_SYS_MMC_U_BOOT_START    (0x00200000)
@@ -52,11 +52,11 @@
 #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)
 #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
                (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
-#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
+#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc
 #endif
 
-#ifndef CONFIG_RESET_VECTOR_ADDRESS
-#define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
+#ifndef CFG_RESET_VECTOR_ADDRESS
+#define CFG_RESET_VECTOR_ADDRESS       0xeffffffc
 #endif
 
 /*
@@ -215,7 +215,9 @@
 /*
  * Serial Port
  */
+#if !CONFIG_IS_ENABLED(DM_SERIAL)
 #define CFG_SYS_NS16550_CLK            (get_bus_freq(0)/2)
+#endif
 #define CFG_SYS_BAUDRATE_TABLE \
        {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 #define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x11C500)