config: Add a default CONFIG_SYS_PROMPT

[platform/kernel/u-boot.git] / include / configs / RBC823.h

diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h
index f36244d..ca86b7f 100644 (file)
--- a/include/configs/RBC823.h
+++ b/include/configs/RBC823.h
@@ -5,23 +5,7 @@
  * Modified by Udi Finkelstein udif@udif.com
  * For the RBC823 board.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -39,6 +23,7 @@
 #define CONFIG_MPC823          1       /* This is a MPC823 CPU         */
 #define CONFIG_RBC823          1       /* ...on a RBC823 module        */
 
+#define        CONFIG_SYS_TEXT_BASE    0xFFF00000
 
 #if 0
 #define DEBUG                  1
@@ -46,6 +31,7 @@
 #endif
 #define CONFIG_KEYBOARD                1       /* This board has a custom keybpard */
 #define CONFIG_LCD             1       /* use LCD controller ...       */
+#define CONFIG_MPC8XX_LCD
 #define CONFIG_HITACHI_SP19X001_Z1A    /* The LCD type we use */
 
 #define        CONFIG_8xx_CONS_SMC2    1       /* Console is on SMC2           */
@@ -114,7 +100,6 @@
 #define CONFIG_CMD_CDP
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_DIAG
-#define CONFIG_CMD_DOC
 #define CONFIG_CMD_EEPROM
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_FAT
@@ -134,7 +119,6 @@
  * Miscellaneous configurable options
  */
 #define        CONFIG_SYS_LONGHELP                     /* undef to save memory         */
-#define        CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt       */
 #if defined(CONFIG_CMD_KGDB)
 #define        CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size      */
 #else
@@ -151,8 +135,6 @@
 
 #define        CONFIG_SYS_HZ           1000            /* decrementer freq: 1 ms ticks */
 
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
-
 /*
  * Low Level Configuration Settings
  * (address mappings, register initial values, etc.)
@@ -167,9 +149,8 @@
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_IMMR
-#define        CONFIG_SYS_INIT_RAM_END 0x2F00  /* End of used area in DPRAM    */
-#define        CONFIG_SYS_GBL_DATA_SIZE        64  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define        CONFIG_SYS_INIT_RAM_SIZE        0x2F00  /* Size of used area in DPRAM   */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define        CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -280,8 +261,8 @@
  */
 #define SCCR_MASK      SCCR_EBDF11
 #define CONFIG_SYS_SCCR        (SCCR_RTDIV   | SCCR_RTSEL    | SCCR_CRQEN    | \
-                        SCCR_PRQEN   | SCCR_EBDF00   | \
-                        SCCR_COM01   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
+                        SCCR_PRQEN   | SCCR_EBDF00   | \
+                        SCCR_COM01   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
                         SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD001 | \
                         SCCR_DFALCD00)
 
@@ -329,14 +310,6 @@
 
 #endif
 
-/************************************************************
- * Disk-On-Chip configuration
- ************************************************************/
-#define CONFIG_SYS_MAX_DOC_DEVICE      1       /* Max number of DOC devices            */
-#define CONFIG_SYS_DOC_SHORT_TIMEOUT
-#define CONFIG_SYS_DOC_SUPPORT_2000
-#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM
-
 /*-----------------------------------------------------------------------
  *
  *-----------------------------------------------------------------------
@@ -370,7 +343,7 @@
 
 #define CONFIG_SYS_OR1_PRELIM  (CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_MSYS)
 #define CONFIG_SYS_BR1_PRELIM  ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMB | \
-                         BR_PS_8 | BR_V)
+                         BR_PS_8 | BR_V)
 
 /*
  * BR4 and OR4 (SDRAM)
@@ -415,15 +388,6 @@
                         MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 |   \
                         MAMR_RLFA_1X    | MAMR_WLFA_1X    | MAMR_TLFA_4X)
 
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define        BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
 /*
  * JFFS2 partitions
  *