SPDX: Convert all of our single license tags to Linux Kernel style

[platform/kernel/u-boot.git] / drivers / clk / uniphier / clk-uniphier-mio.c

diff --git a/drivers/clk/uniphier/clk-uniphier-mio.c b/drivers/clk/uniphier/clk-uniphier-mio.c
index 18e6856..c201f81 100644 (file)
--- a/drivers/clk/uniphier/clk-uniphier-mio.c
+++ b/drivers/clk/uniphier/clk-uniphier-mio.c
@@ -1,85 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2016 Socionext Inc.
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include "clk-uniphier.h"
 
-#define UNIPHIER_MIO_CLK_SD_GATE(id, ch)                               \
-       UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 8)
+#define UNIPHIER_MIO_CLK_SD_FIXED                                      \
+       UNIPHIER_CLK_RATE(128, 44444444),                               \
+       UNIPHIER_CLK_RATE(129, 33333333),                               \
+       UNIPHIER_CLK_RATE(130, 50000000),                               \
+       UNIPHIER_CLK_RATE(131, 66666667),                               \
+       UNIPHIER_CLK_RATE(132, 100000000),                              \
+       UNIPHIER_CLK_RATE(133, 40000000),                               \
+       UNIPHIER_CLK_RATE(134, 25000000),                               \
+       UNIPHIER_CLK_RATE(135, 22222222)
+
+#define UNIPHIER_MIO_CLK_SD(_id, ch)                                   \
+       {                                                               \
+               .type = UNIPHIER_CLK_TYPE_MUX,                          \
+               .id = (_id) + 32,                                       \
+               .data.mux = {                                           \
+                       .parent_ids = {                                 \
+                               128,                                    \
+                               129,                                    \
+                               130,                                    \
+                               131,                                    \
+                               132,                                    \
+                               133,                                    \
+                               134,                                    \
+                               135,                                    \
+                       },                                              \
+                       .num_parents = 8,                               \
+                       .reg = 0x30 + 0x200 * (ch),                     \
+                       .masks = {                                      \
+                               0x00031000,                             \
+                               0x00031000,                             \
+                               0x00031000,                             \
+                               0x00031000,                             \
+                               0x00001300,                             \
+                               0x00001300,                             \
+                               0x00001300,                             \
+                               0x00001300,                             \
+                       },                                              \
+                       .vals = {                                       \
+                               0x00000000,                             \
+                               0x00010000,                             \
+                               0x00020000,                             \
+                               0x00030000,                             \
+                               0x00001000,                             \
+                               0x00001100,                             \
+                               0x00001200,                             \
+                               0x00001300,                             \
+                       },                                              \
+               },                                                      \
+       },                                                              \
+       UNIPHIER_CLK_GATE((_id), (_id) + 32, 0x20 + 0x200 * (ch), 8)
 
 #define UNIPHIER_MIO_CLK_USB2(id, ch)                                  \
-       UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 28)
+       UNIPHIER_CLK_GATE_SIMPLE((id), 0x20 + 0x200 * (ch), 28)
 
 #define UNIPHIER_MIO_CLK_USB2_PHY(id, ch)                              \
-       UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 29)
+       UNIPHIER_CLK_GATE_SIMPLE((id), 0x20 + 0x200 * (ch), 29)
 
 #define UNIPHIER_MIO_CLK_DMAC(id)                                      \
-       UNIPHIER_CLK_GATE((id), 0x20, 25)
-
-#define UNIPHIER_MIO_CLK_SD_MUX(_id, ch)                               \
-       {                                                               \
-               .id = (_id),                                            \
-               .nr_muxs = 8,                                           \
-               .reg = 0x30 + 0x200 * (ch),                             \
-               .masks = {                                              \
-                       0x00031000,                                     \
-                       0x00031000,                                     \
-                       0x00031000,                                     \
-                       0x00031000,                                     \
-                       0x00001300,                                     \
-                       0x00001300,                                     \
-                       0x00001300,                                     \
-                       0x00001300,                                     \
-               },                                                      \
-               .vals = {                                               \
-                       0x00000000,                                     \
-                       0x00010000,                                     \
-                       0x00020000,                                     \
-                       0x00030000,                                     \
-                       0x00001000,                                     \
-                       0x00001100,                                     \
-                       0x00001200,                                     \
-                       0x00001300,                                     \
-               },                                                      \
-               .rates = {                                              \
-                       44444444,                                       \
-                       33333333,                                       \
-                       50000000,                                       \
-                       66666666,                                       \
-                       100000000,                                      \
-                       40000000,                                       \
-                       25000000,                                       \
-                       22222222,                                       \
-               },                                                      \
-       }
+       UNIPHIER_CLK_GATE_SIMPLE((id), 0x20, 25)
 
-static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {
-       UNIPHIER_MIO_CLK_SD_GATE(0, 0),
-       UNIPHIER_MIO_CLK_SD_GATE(1, 1),
-       UNIPHIER_MIO_CLK_SD_GATE(2, 2),         /* for PH1-Pro4 only */
+const struct uniphier_clk_data uniphier_mio_clk_data[] = {
+       UNIPHIER_MIO_CLK_SD_FIXED,
+       UNIPHIER_MIO_CLK_SD(0, 0),
+       UNIPHIER_MIO_CLK_SD(1, 1),
+       UNIPHIER_MIO_CLK_SD(2, 2),
        UNIPHIER_MIO_CLK_DMAC(7),
        UNIPHIER_MIO_CLK_USB2(8, 0),
        UNIPHIER_MIO_CLK_USB2(9, 1),
        UNIPHIER_MIO_CLK_USB2(10, 2),
-       UNIPHIER_MIO_CLK_USB2(11, 3),           /* for PH1-sLD3 only */
        UNIPHIER_MIO_CLK_USB2_PHY(12, 0),
        UNIPHIER_MIO_CLK_USB2_PHY(13, 1),
        UNIPHIER_MIO_CLK_USB2_PHY(14, 2),
-       UNIPHIER_MIO_CLK_USB2_PHY(15, 3),       /* for PH1-sLD3 only */
-       UNIPHIER_CLK_END
-};
-
-static const struct uniphier_clk_mux_data uniphier_mio_clk_mux[] = {
-       UNIPHIER_MIO_CLK_SD_MUX(0, 0),
-       UNIPHIER_MIO_CLK_SD_MUX(1, 1),
-       UNIPHIER_MIO_CLK_SD_MUX(2, 2),          /* for PH1-Pro4 only */
-       UNIPHIER_CLK_END
-};
-
-const struct uniphier_clk_data uniphier_mio_clk_data = {
-       .gate = uniphier_mio_clk_gate,
-       .mux = uniphier_mio_clk_mux,
+       { /* sentinel */ }
 };