Convert CONFIG_SYS_NS16550_MEM32 et al to Kconfig

[platform/kernel/u-boot.git] / configs / P1010RDB-PA_36BIT_NAND_defconfig

diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index b44264f..a3d9a8b 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -1,26 +1,33 @@
 CONFIG_PPC=y
-CONFIG_SYS_IMMR=0xFFE00000
-CONFIG_SYS_TEXT_BASE=0x11001000
+CONFIG_TEXT_BASE=0x11000000
 CONFIG_SYS_MALLOC_LEN=0x100000
 CONFIG_ENV_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
 CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SPL_SERIAL=y
-CONFIG_TPL_TEXT_BASE=0xD0001000
+CONFIG_TPL_TEXT_BASE=0xD0000000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_TPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
+CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_MPC85xx=y
+CONFIG_SYS_INIT_RAM_LOCK=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_ENABLE_36BIT_PHYS=y
+CONFIG_SYS_MPC85XX_NO_RESETVEC=y
+CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
+CONFIG_PCIE1=y
+CONFIG_PCIE2=y
 CONFIG_PHYS_64BIT=y
+CONFIG_SYS_MONITOR_LEN=786432
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000
+CONFIG_TPL_SYS_MONITOR_BASE=0xD0000000
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
@@ -28,8 +35,21 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_BOARD_EARLY_INIT_R=y
 # CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_MAX_SIZE=0x2000
 CONFIG_SPL_NAND_BOOT=y
+CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
+CONFIG_SPL_INIT_MINIMAL=y
+CONFIG_SPL_FLUSH_IMAGE=y
+CONFIG_SPL_RELOC_TEXT_BASE=0xd003d000
+CONFIG_SPL_RELOC_STACK=0xd003fff0
+CONFIG_TPL_GD_ADDR=0xd002c000
+CONFIG_TPL_RELOC_TEXT_BASE=0xd0000000
+CONFIG_TPL_RELOC_STACK=0xd0030000
+CONFIG_TPL_RELOC_MALLOC=y
+CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
+CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_DRIVERS_MISC=y
 CONFIG_TPL_ENV_SUPPORT=y
@@ -37,10 +57,13 @@ CONFIG_TPL_I2C=y
 CONFIG_TPL_MPC8XXX_INIT_DDR=y
 CONFIG_TPL_NAND_SUPPORT=y
 CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
 CONFIG_CMD_I2C=y
+CONFIG_LOADS_ECHO=y
+CONFIG_SYS_LOADS_BAUD_CHANGE=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
@@ -52,16 +75,20 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel
 CONFIG_OF_CONTROL=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_ENV_RANGE=0xc000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_USE_BOOTFILE=y
 CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
-CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_SYS_SPD_BUS_NUM=1
 CONFIG_CHIP_SELECTS_PER_CTRL=1
+CONFIG_SYS_DDR_RAW_TIMING=y
+CONFIG_TPL_COMMON_INIT_DDR=y
 CONFIG_DM_I2C=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_TPL_SYS_I2C_LEGACY=y
@@ -75,7 +102,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
@@ -92,7 +122,6 @@ CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_SMSC=y
 CONFIG_PHY_VITESSE=y
-CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
@@ -100,7 +129,8 @@ CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_PCIE_FSL=y
 CONFIG_DM_RTC=y
-CONFIG_SYS_NS16550=y
+CONFIG_SYS_NS16550_SERIAL=y
+CONFIG_SPL_NS16550_MIN_FUNCTIONS=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_FSL_ESPI=y