rename CFG_ macros to CONFIG_SYS

[platform/kernel/u-boot.git] / board / tqc / tqm8260 / tqm8260.c

diff --git a/board/tqc/tqm8260/tqm8260.c b/board/tqc/tqm8260/tqm8260.c
index f201045..3039999 100644 (file)
--- a/board/tqc/tqm8260/tqm8260.c
+++ b/board/tqc/tqm8260/tqm8260.c
@@ -236,7 +236,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
         */
        maxsize = (1 + (~orx | 0x7fff)) / 2;
 
-       /* Since CFG_SDRAM_BASE is always 0 (??), we assume that
+       /* Since CONFIG_SYS_SDRAM_BASE is always 0 (??), we assume that
         * we are configuring CS1 if base != 0
         */
        sdmr_ptr = base ? &memctl->memc_lsdmr : &memctl->memc_psdmr;
@@ -261,7 +261,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
         *  accessing the SDRAM with a single-byte transaction."
         *
         * The appropriate BRx/ORx registers have already been set when we
-        * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+        * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
         */
 
        *sdmr_ptr = sdmr | PSDMR_OP_PREA;
@@ -272,7 +272,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
                *base = c;
 
        *sdmr_ptr = sdmr | PSDMR_OP_MRW;
-       *(base + CFG_MRS_OFFS) = c;     /* setting MR on address lines */
+       *(base + CONFIG_SYS_MRS_OFFS) = c;      /* setting MR on address lines */
 
        *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
        *base = c;
@@ -285,10 +285,10 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
 
 phys_size_t initdram (int board_type)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile memctl8260_t *memctl = &immap->im_memctl;
 
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
        long size8, size9;
 #endif
        long psize, lsize;
@@ -296,8 +296,8 @@ phys_size_t initdram (int board_type)
        psize = 16 * 1024 * 1024;
        lsize = 0;
 
-       memctl->memc_psrt = CFG_PSRT;
-       memctl->memc_mptpr = CFG_MPTPR;
+       memctl->memc_psrt = CONFIG_SYS_PSRT;
+       memctl->memc_mptpr = CONFIG_SYS_MPTPR;
 
 #if 0                                                  /* Just for debugging */
 #define        prt_br_or(brX,orX) do {                         \
@@ -315,37 +315,37 @@ phys_size_t initdram (int board_type)
        prt_br_or (br3, or3);
 #endif
 
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
        /* 60x SDRAM setup:
         */
-       size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR1_8COL,
-                                         (uchar *) CFG_SDRAM_BASE);
-       size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR1_9COL,
-                                         (uchar *) CFG_SDRAM_BASE);
+       size8 = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR1_8COL,
+                                         (uchar *) CONFIG_SYS_SDRAM_BASE);
+       size9 = try_init (memctl, CONFIG_SYS_PSDMR_9COL, CONFIG_SYS_OR1_9COL,
+                                         (uchar *) CONFIG_SYS_SDRAM_BASE);
 
        if (size8 < size9) {
                psize = size9;
                printf ("(60x:9COL - %ld MB, ", psize >> 20);
        } else {
-               psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR1_8COL,
-                                                 (uchar *) CFG_SDRAM_BASE);
+               psize = try_init (memctl, CONFIG_SYS_PSDMR_8COL, CONFIG_SYS_OR1_8COL,
+                                                 (uchar *) CONFIG_SYS_SDRAM_BASE);
                printf ("(60x:8COL - %ld MB, ", psize >> 20);
        }
 
        /* Local SDRAM setup:
         */
-#ifdef CFG_INIT_LOCAL_SDRAM
-       memctl->memc_lsrt = CFG_LSRT;
-       size8 = try_init (memctl, CFG_LSDMR_8COL, CFG_OR2_8COL,
+#ifdef CONFIG_SYS_INIT_LOCAL_SDRAM
+       memctl->memc_lsrt = CONFIG_SYS_LSRT;
+       size8 = try_init (memctl, CONFIG_SYS_LSDMR_8COL, CONFIG_SYS_OR2_8COL,
                                          (uchar *) SDRAM_BASE2_PRELIM);
-       size9 = try_init (memctl, CFG_LSDMR_9COL, CFG_OR2_9COL,
+       size9 = try_init (memctl, CONFIG_SYS_LSDMR_9COL, CONFIG_SYS_OR2_9COL,
                                          (uchar *) SDRAM_BASE2_PRELIM);
 
        if (size8 < size9) {
                lsize = size9;
                printf ("Local:9COL - %ld MB) using ", lsize >> 20);
        } else {
-               lsize = try_init (memctl, CFG_LSDMR_8COL, CFG_OR2_8COL,
+               lsize = try_init (memctl, CONFIG_SYS_LSDMR_8COL, CONFIG_SYS_OR2_8COL,
                                                  (uchar *) SDRAM_BASE2_PRELIM);
                printf ("Local:8COL - %ld MB) using ", lsize >> 20);
        }
@@ -354,11 +354,11 @@ phys_size_t initdram (int board_type)
        /* Set up BR2 so that the local SDRAM goes
         * right after the 60x SDRAM
         */
-       memctl->memc_br2 = (CFG_BR2_PRELIM & ~BRx_BA_MSK) |
-                       (CFG_SDRAM_BASE + psize);
+       memctl->memc_br2 = (CONFIG_SYS_BR2_PRELIM & ~BRx_BA_MSK) |
+                       (CONFIG_SYS_SDRAM_BASE + psize);
 #endif
-#endif /* CFG_INIT_LOCAL_SDRAM */
-#endif /* CFG_RAMBOOT */
+#endif /* CONFIG_SYS_INIT_LOCAL_SDRAM */
+#endif /* CONFIG_SYS_RAMBOOT */
 
        icache_enable ();