/*
* Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <version.h>
wait_timer WAIT_200US
/*------- GPIO -------*/
- write16 PACR_A, PACR_D
- write16 PBCR_A, PBCR_D
- write16 PCCR_A, PCCR_D
- write16 PDCR_A, PDCR_D
- write16 PECR_A, PECR_D
- write16 PFCR_A, PFCR_D
- write16 PGCR_A, PGCR_D
+ write16 PACR_A, PXCR_D
+ write16 PBCR_A, PXCR_D
+ write16 PCCR_A, PXCR_D
+ write16 PDCR_A, PXCR_D
+ write16 PECR_A, PXCR_D
+ write16 PFCR_A, PXCR_D
+ write16 PGCR_A, PXCR_D
write16 PHCR_A, PHCR_D
write16 PJCR_A, PJCR_D
write16 PKCR_A, PKCR_D
- write16 PLCR_A, PLCR_D
+ write16 PLCR_A, PXCR_D
write16 PMCR_A, PMCR_D
write16 PNCR_A, PNCR_D
- write16 PPCR_A, PPCR_D
- write16 PQCR_A, PQCR_D
- write16 PRCR_A, PRCR_D
+ write16 PPCR_A, PXCR_D
+ write16 PQCR_A, PXCR_D
+ write16 PRCR_A, PXCR_D
write8 PEPUPR_A, PEPUPR_D
write8 PHPUPR_A, PHPUPR_D
.align 4
-/*------- LBSC -------*/
-MMSELR_A: .long 0xfc400020
+/*------- GPIO -------*/
+/* P{A,B C,D,E,F,G,L,P,Q,R}CR_D */
+PXCR_D: .word 0x0000
+
+PHCR_D: .word 0x00c0
+PJCR_D: .word 0xc3fc
+PKCR_D: .word 0x03ff
+PMCR_D: .word 0xffff
+PNCR_D: .word 0xf0c3
+
+PEPUPR_D: .long 0xff
+PHPUPR_D: .long 0x00
+PJPUPR_D: .long 0x00
+PKPUPR_D: .long 0x00
+PLPUPR_D: .long 0x00
+PMPUPR_D: .long 0xfc
+PNPUPR_D: .long 0x00
+PPUPR1_D: .word 0xffbf
+PPUPR2_D: .word 0xff00
+P1MSELR_D: .word 0x3780
+P2MSELR_D: .word 0x0000
+
+#define GPIO_BASE 0xffe70000
+PACR_A: .long GPIO_BASE + 0x00
+PBCR_A: .long GPIO_BASE + 0x02
+PCCR_A: .long GPIO_BASE + 0x04
+PDCR_A: .long GPIO_BASE + 0x06
+PECR_A: .long GPIO_BASE + 0x08
+PFCR_A: .long GPIO_BASE + 0x0a
+PGCR_A: .long GPIO_BASE + 0x0c
+PHCR_A: .long GPIO_BASE + 0x0e
+PJCR_A: .long GPIO_BASE + 0x10
+PKCR_A: .long GPIO_BASE + 0x12
+PLCR_A: .long GPIO_BASE + 0x14
+PMCR_A: .long GPIO_BASE + 0x16
+PNCR_A: .long GPIO_BASE + 0x18
+PPCR_A: .long GPIO_BASE + 0x1a
+PQCR_A: .long GPIO_BASE + 0x1c
+PRCR_A: .long GPIO_BASE + 0x1e
+PEPUPR_A: .long GPIO_BASE + 0x48
+PHPUPR_A: .long GPIO_BASE + 0x4e
+PJPUPR_A: .long GPIO_BASE + 0x50
+PKPUPR_A: .long GPIO_BASE + 0x52
+PLPUPR_A: .long GPIO_BASE + 0x54
+PMPUPR_A: .long GPIO_BASE + 0x56
+PNPUPR_A: .long GPIO_BASE + 0x58
+PPUPR1_A: .long GPIO_BASE + 0x60
+PPUPR2_A: .long GPIO_BASE + 0x62
+P1MSELR_A: .long GPIO_BASE + 0x80
+P2MSELR_A: .long GPIO_BASE + 0x82
+
+MMSELR_A: .long 0xfc400020
#if defined(CONFIG_SH_32BIT)
-MMSELR_D: .long 0xa5a50005
+MMSELR_D: .long 0xa5a50005
#else
-MMSELR_D: .long 0xa5a50002
+MMSELR_D: .long 0xa5a50002
#endif
/*------- DBSC2 -------*/
DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48
DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c
DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50
-DBSC2_DBDICODTOCD_A: .long DBSC2_BASE + 0x54
+DBSC2_DBDICODTOCD_A:.long DBSC2_BASE + 0x54
DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60
DDR_DUMMY_ACCESS_A: .long 0x40000000
DBSC2_DBTR2_D: .long 0x02100308
DBSC2_DBFREQ_D1: .long 0x00000000
DBSC2_DBFREQ_D2: .long 0x00000100
-DBSC2_DBDICODTOCD_D: .long 0x000f0907
+DBSC2_DBDICODTOCD_D:.long 0x000f0907
DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003
DBSC2_DBCMDCNT_D_PALL: .long 0x00000002
DBSC2_DBRFCNT2_D: .long 0x00fe00fe
DBSC2_DBRFCNT0_D: .long 0x00010000
-WAIT_200US: .long 33333
-
-/*------- GPIO -------*/
-#define GPIO_BASE 0xffe70000
-PACR_A: .long GPIO_BASE + 0x00
-PBCR_A: .long GPIO_BASE + 0x02
-PCCR_A: .long GPIO_BASE + 0x04
-PDCR_A: .long GPIO_BASE + 0x06
-PECR_A: .long GPIO_BASE + 0x08
-PFCR_A: .long GPIO_BASE + 0x0a
-PGCR_A: .long GPIO_BASE + 0x0c
-PHCR_A: .long GPIO_BASE + 0x0e
-PJCR_A: .long GPIO_BASE + 0x10
-PKCR_A: .long GPIO_BASE + 0x12
-PLCR_A: .long GPIO_BASE + 0x14
-PMCR_A: .long GPIO_BASE + 0x16
-PNCR_A: .long GPIO_BASE + 0x18
-PPCR_A: .long GPIO_BASE + 0x1a
-PQCR_A: .long GPIO_BASE + 0x1c
-PRCR_A: .long GPIO_BASE + 0x1e
-PEPUPR_A: .long GPIO_BASE + 0x48
-PHPUPR_A: .long GPIO_BASE + 0x4e
-PJPUPR_A: .long GPIO_BASE + 0x50
-PKPUPR_A: .long GPIO_BASE + 0x52
-PLPUPR_A: .long GPIO_BASE + 0x54
-PMPUPR_A: .long GPIO_BASE + 0x56
-PNPUPR_A: .long GPIO_BASE + 0x58
-PPUPR1_A: .long GPIO_BASE + 0x60
-PPUPR2_A: .long GPIO_BASE + 0x62
-P1MSELR_A: .long GPIO_BASE + 0x80
-P2MSELR_A: .long GPIO_BASE + 0x82
-
-PACR_D: .long 0x0000
-PBCR_D: .long 0x0000
-PCCR_D: .long 0x0000
-PDCR_D: .long 0x0000
-PECR_D: .long 0x0000
-PFCR_D: .long 0x0000
-PGCR_D: .long 0x0000
-PHCR_D: .long 0x00c0
-PJCR_D: .long 0xc3fc
-PKCR_D: .long 0x03ff
-PLCR_D: .long 0x0000
-PMCR_D: .long 0xffff
-PNCR_D: .long 0xf0c3
-PPCR_D: .long 0x0000
-PQCR_D: .long 0x0000
-PRCR_D: .long 0x0000
-
-PEPUPR_D: .long 0xff
-PHPUPR_D: .long 0x00
-PJPUPR_D: .long 0x00
-PKPUPR_D: .long 0x00
-PLPUPR_D: .long 0x00
-PMPUPR_D: .long 0xfc
-PNPUPR_D: .long 0x00
-PPUPR1_D: .long 0xffbf
-PPUPR2_D: .long 0xff00
-P1MSELR_D: .long 0x3780
-P2MSELR_D: .long 0x0000
+WAIT_200US: .long 33333
/*------- LBSC -------*/
PASCR_A: .long 0xff000070
/* USB setting : 32bit mode = CS2, 29bit mode = CS5 */
CS_USB_BCR_D: .long 0x11111200
-CS_USB_WCR_D: .long 0x00020004
+CS_USB_WCR_D: .long 0x00020005
/* SD setting : 32bit mode = CS3, 29bit mode = CS6 */
CS_SD_BCR_D: .long 0x00000300
projects / platform / kernel / u-boot.git / blobdiff