global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*

[platform/kernel/u-boot.git] / board / renesas / lager / lager.c

diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 586c6c3..1437875 100644 (file)
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -1,22 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * board/renesas/lager/lager.c
  *     This file is lager board support.
  *
  * Copyright (C) 2013 Renesas Electronics Corporation
  * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- *
- * SPDX-License-Identifier: GPL-2.0
  */
 
 #include <common.h>
-#include <environment.h>
+#include <clock_legacy.h>
+#include <cpu_func.h>
+#include <env.h>
+#include <env_internal.h>
+#include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <dm.h>
+#include <asm/global_data.h>
 #include <dm/platform_data/serial_sh.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
@@ -44,7 +51,7 @@ void s_init(void)
        /* CPU frequency setting. Set to 1.4GHz */
        if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
                u32 stat = 0;
-               u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
+               u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
                        << PLL0_STC_BIT;
                clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 
@@ -82,7 +89,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+       gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
        /* Force ethernet PHY out of reset */
        gpio_request(ETHERNET_PHY_RESET, "phy_reset");
@@ -95,7 +102,7 @@ int board_init(void)
 
 int dram_init(void)
 {
-       if (fdtdec_setup_memory_size() != 0)
+       if (fdtdec_setup_mem_size_base() != 0)
                return -EINVAL;
 
        return 0;
@@ -110,7 +117,7 @@ int dram_init_banksize(void)
 
 /* KSZ8041NL/RNL */
 #define PHY_CONTROL1           0x1E
-#define PHY_LED_MODE           0xC0000
+#define PHY_LED_MODE           0xC000
 #define PHY_LED_MODE_ACK       0x4000
 int board_phy_config(struct phy_device *phydev)
 {
@@ -122,7 +129,7 @@ int board_phy_config(struct phy_device *phydev)
        return 0;
 }
 
-void reset_cpu(ulong addr)
+void reset_cpu(void)
 {
        struct udevice *dev;
        const u8 pmic_bus = 2;