rename CFG_ macros to CONFIG_SYS

[platform/kernel/u-boot.git] / board / netta2 / netta2.c

diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c
index 1dbdde1..2ce33cf 100644 (file)
--- a/board/netta2/netta2.c
+++ b/board/netta2/netta2.c
@@ -354,7 +354,7 @@ static const uint nandcs_table[0x40] = {
 #define MAR_SDRAM_INIT         ((CAS_LATENCY << 6) | 0x00000008LU)
 
 /* 8 */
-#define CFG_MAMR       ((CFG_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE      |   \
+#define CONFIG_SYS_MAMR        ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE       |   \
                         MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 |   \
                         MAMR_RLFA_1X    | MAMR_WLFA_1X    | MAMR_TLFA_4X)
 
@@ -404,7 +404,7 @@ void check_ram(unsigned int addr, unsigned int size)
 
 phys_size_t initdram(int board_type)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
        long int size;
 
@@ -420,10 +420,10 @@ phys_size_t initdram(int board_type)
        /*
         * Map controller bank 3 to the SDRAM bank at preliminary address.
         */
-       memctl->memc_or3 = CFG_OR3_PRELIM;
-       memctl->memc_br3 = CFG_BR3_PRELIM;
+       memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM;
+       memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM;
 
-       memctl->memc_mbmr = CFG_MAMR & ~MAMR_PTAE;      /* no refresh yet */
+       memctl->memc_mbmr = CONFIG_SYS_MAMR & ~MAMR_PTAE;       /* no refresh yet */
 
        udelay(200);
 
@@ -544,7 +544,7 @@ void reset_phys(void)
 
 int board_early_init_f(void)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile iop8xx_t *ioport = &immap->im_ioport;
        volatile cpm8xx_t *cpm = &immap->im_cpm;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
@@ -600,13 +600,13 @@ int board_early_init_f(void)
 #include <linux/mtd/nand_legacy.h>
 
 extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE];
 
 void nand_init(void)
 {
        unsigned long totlen;
 
-       totlen = nand_probe(CFG_NAND_BASE);
+       totlen = nand_probe(CONFIG_SYS_NAND_BASE);
        printf ("%4lu MB\n", totlen >> 20);
 }
 #endif
@@ -620,7 +620,7 @@ void hw_watchdog_reset(void)
 
 #endif
 
-#if defined(CFG_CONSOLE_IS_IN_ENV) && defined(CFG_CONSOLE_OVERWRITE_ROUTINE)
+#if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE)
 int overwrite_console(void)
 {
        /* printf("overwrite_console called\n"); */
@@ -645,10 +645,10 @@ int last_stage_init(void)
 
 #if CONFIG_NETTA2_VERSION == 2
        /* assert peripheral reset */
-       ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~_BW(12);
+       ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat &= ~_BW(12);
        for (i = 0; i < 10; i++)
                udelay(1000);
-       ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat |=  _BW(12);
+       ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat |=  _BW(12);
 #endif
        reset_phys();