rename CFG_ macros to CONFIG_SYS

[platform/kernel/u-boot.git] / board / freescale / mpc8349itx / pci.c

diff --git a/board/freescale/mpc8349itx/pci.c b/board/freescale/mpc8349itx/pci.c
index d33edf3..fd2c172 100644 (file)
--- a/board/freescale/mpc8349itx/pci.c
+++ b/board/freescale/mpc8349itx/pci.c
@@ -37,8 +37,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* System RAM mapped to PCI space */
-#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
-#define CONFIG_PCI_SYS_MEM_PHYS        CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_PHYS        CONFIG_SYS_SDRAM_BASE
 
 #ifndef CONFIG_PCI_PNP
 static struct pci_config_table pci_mpc8349itx_config_table[] = {
@@ -92,7 +92,7 @@ void pci_init_board(void)
        u32 dev;
        struct pci_controller *hose;
 
-       immr = (immap_t *) CFG_IMMR;
+       immr = (immap_t *) CONFIG_SYS_IMMR;
        clk = (clk83xx_t *) & immr->clk;
        pci_law = immr->sysconf.pcilaw;
        pci_pot = immr->ios.pot;
@@ -111,8 +111,8 @@ void pci_init_board(void)
 #ifdef CONFIG_HARD_I2C
        i2c_set_bus_num(1);
        /* Read the PCI_M66EN jumper setting */
-       if ((i2c_read(CFG_I2C_8574_ADDR2, 0, 0, &reg8, sizeof(reg8)) == 0) ||
-           (i2c_read(CFG_I2C_8574A_ADDR2, 0, 0, &reg8, sizeof(reg8)) == 0)) {
+       if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, &reg8, sizeof(reg8)) == 0) ||
+           (i2c_read(CONFIG_SYS_I2C_8574A_ADDR2, 0, 0, &reg8, sizeof(reg8)) == 0)) {
                if (reg8 & I2C_8574_PCI66)
                        clk->occr = 0xff000000; /* 66 MHz PCI */
                else
@@ -150,10 +150,10 @@ void pci_init_board(void)
        /*
         * Configure PCI Local Access Windows
         */
-       pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+       pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
        pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
 
-       pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+       pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
        pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M;
 
        /*
@@ -161,18 +161,18 @@ void pci_init_board(void)
         */
 
        /* PCI1 mem space - prefetch */
-       pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
-       pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
+       pci_pot[0].potar = (CONFIG_SYS_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
+       pci_pot[0].pobar = (CONFIG_SYS_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
        pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN | POCMR_CM_256M;
 
        /* PCI1 IO space */
-       pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
-       pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
+       pci_pot[1].potar = (CONFIG_SYS_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
+       pci_pot[1].pobar = (CONFIG_SYS_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
        pci_pot[1].pocmr = POCMR_EN | POCMR_IO | POCMR_CM_16M;
 
        /* PCI1 mmio - non-prefetch mem space */
-       pci_pot[2].potar = (CFG_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
-       pci_pot[2].pobar = (CFG_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+       pci_pot[2].potar = (CONFIG_SYS_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
+       pci_pot[2].pobar = (CONFIG_SYS_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
        pci_pot[2].pocmr = POCMR_EN | POCMR_CM_256M;
 
        /*
@@ -192,19 +192,19 @@ void pci_init_board(void)
 
        /* PCI memory prefetch space */
        pci_set_region(hose->regions + 0,
-                      CFG_PCI1_MEM_BASE,
-                      CFG_PCI1_MEM_PHYS,
-                      CFG_PCI1_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
+                      CONFIG_SYS_PCI1_MEM_BASE,
+                      CONFIG_SYS_PCI1_MEM_PHYS,
+                      CONFIG_SYS_PCI1_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
 
        /* PCI memory space */
        pci_set_region(hose->regions + 1,
-                      CFG_PCI1_MMIO_BASE,
-                      CFG_PCI1_MMIO_PHYS, CFG_PCI1_MMIO_SIZE, PCI_REGION_MEM);
+                      CONFIG_SYS_PCI1_MMIO_BASE,
+                      CONFIG_SYS_PCI1_MMIO_PHYS, CONFIG_SYS_PCI1_MMIO_SIZE, PCI_REGION_MEM);
 
        /* PCI IO space */
        pci_set_region(hose->regions + 2,
-                      CFG_PCI1_IO_BASE,
-                      CFG_PCI1_IO_PHYS, CFG_PCI1_IO_SIZE, PCI_REGION_IO);
+                      CONFIG_SYS_PCI1_IO_BASE,
+                      CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_SIZE, PCI_REGION_IO);
 
        /* System memory space */
        pci_set_region(hose->regions + 3,
@@ -215,7 +215,7 @@ void pci_init_board(void)
        hose->region_count = 4;
 
        pci_setup_indirect(hose,
-                          (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
+                          (CONFIG_SYS_IMMR + 0x8300), (CONFIG_SYS_IMMR + 0x8304));
 
        pci_register_hose(hose);
 
@@ -251,18 +251,18 @@ void pci_init_board(void)
         */
 
        /* PCI2 mem space - prefetch */
-       pci_pot[3].potar = (CFG_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
-       pci_pot[3].pobar = (CFG_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
+       pci_pot[3].potar = (CONFIG_SYS_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
+       pci_pot[3].pobar = (CONFIG_SYS_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
        pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | POCMR_CM_256M;
 
        /* PCI2 IO space */
-       pci_pot[4].potar = (CFG_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
-       pci_pot[4].pobar = (CFG_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
+       pci_pot[4].potar = (CONFIG_SYS_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
+       pci_pot[4].pobar = (CONFIG_SYS_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
        pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO | POCMR_CM_16M;
 
        /* PCI2 mmio - non-prefetch mem space */
-       pci_pot[5].potar = (CFG_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
-       pci_pot[5].pobar = (CFG_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+       pci_pot[5].potar = (CONFIG_SYS_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
+       pci_pot[5].pobar = (CONFIG_SYS_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
        pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_CM_256M;
 
        /*
@@ -283,19 +283,19 @@ void pci_init_board(void)
 
        /* PCI memory prefetch space */
        pci_set_region(hose->regions + 0,
-                      CFG_PCI2_MEM_BASE,
-                      CFG_PCI2_MEM_PHYS,
-                      CFG_PCI2_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
+                      CONFIG_SYS_PCI2_MEM_BASE,
+                      CONFIG_SYS_PCI2_MEM_PHYS,
+                      CONFIG_SYS_PCI2_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
 
        /* PCI memory space */
        pci_set_region(hose->regions + 1,
-                      CFG_PCI2_MMIO_BASE,
-                      CFG_PCI2_MMIO_PHYS, CFG_PCI2_MMIO_SIZE, PCI_REGION_MEM);
+                      CONFIG_SYS_PCI2_MMIO_BASE,
+                      CONFIG_SYS_PCI2_MMIO_PHYS, CONFIG_SYS_PCI2_MMIO_SIZE, PCI_REGION_MEM);
 
        /* PCI IO space */
        pci_set_region(hose->regions + 2,
-                      CFG_PCI2_IO_BASE,
-                      CFG_PCI2_IO_PHYS, CFG_PCI2_IO_SIZE, PCI_REGION_IO);
+                      CONFIG_SYS_PCI2_IO_BASE,
+                      CONFIG_SYS_PCI2_IO_PHYS, CONFIG_SYS_PCI2_IO_SIZE, PCI_REGION_IO);
 
        /* System memory space */
        pci_set_region(hose->regions + 3,
@@ -306,7 +306,7 @@ void pci_init_board(void)
        hose->region_count = 4;
 
        pci_setup_indirect(hose,
-                          (CFG_IMMR + 0x8380), (CFG_IMMR + 0x8384));
+                          (CONFIG_SYS_IMMR + 0x8380), (CONFIG_SYS_IMMR + 0x8384));
 
        pci_register_hose(hose);