rename CFG_ macros to CONFIG_SYS

[platform/kernel/u-boot.git] / board / amcc / luan / luan.c

diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index b14b6e1..b28ebf9 100644 (file)
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -30,7 +30,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
 
 
 /*************************************************************************
@@ -80,7 +80,7 @@ int board_early_init_f(void)
  ************************************************************************/
 int misc_init_r(void)
 {
-       volatile epld_t *x = (epld_t *) CFG_EPLD_BASE;
+       volatile epld_t *x = (epld_t *) CONFIG_SYS_EPLD_BASE;
 
        /* set modes of operation */
        x->ethuart |= EPLD2_ETH_MODE_10 | EPLD2_ETH_MODE_100 |
@@ -166,7 +166,7 @@ int pci_pre_init( struct pci_controller *hose )
  *     may not be sufficient for a given board.
  *
  ************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
+#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
 void pci_target_init(struct pci_controller *hose)
 {
        /*--------------------------------------------------------------------------+
@@ -181,7 +181,7 @@ void pci_target_init(struct pci_controller *hose)
         * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
         * options to not support sizes such as 128/256 MB.
         *--------------------------------------------------------------------------*/
-       out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE );
+       out32r( PCIX0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
        out32r( PCIX0_PIM0LAH, 0 );
        out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
 
@@ -190,12 +190,12 @@ void pci_target_init(struct pci_controller *hose)
        /*--------------------------------------------------------------------------+
         * Program the board's subsystem id/vendor id
         *--------------------------------------------------------------------------*/
-       out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID );
-       out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID );
+       out16r( PCIX0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
+       out16r( PCIX0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
 
        out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
 }
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
+#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
 
 
 /*************************************************************************