global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*

[platform/kernel/u-boot.git] / board / Marvell / mvebu_armada-37xx / board.c

diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c
index c630437..45fe3e5 100644 (file)
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -11,6 +11,7 @@
 #include <i2c.h>
 #include <init.h>
 #include <mmc.h>
+#include <miiphy.h>
 #include <phy.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
@@ -59,11 +60,11 @@ DECLARE_GLOBAL_DATA_PTR;
  * Memory Controller Registers
  *
  * Assembled based on public information:
- * https://gitlab.nic.cz/turris/mox-boot-builder/-/blob/master/wtmi/main.c#L332-336
+ * https://gitlab.nic.cz/turris/mox-boot-builder/-/blob/v2020.11.26/wtmi/main.c#L332-336
  * https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/blob/mv_ddr-armada-18.12/drivers/mv_ddr_mc6.h#L309-L332
  *
  * And checked against the written register values for the various topologies:
- * https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/blob/mv_ddr-armada-atf-mainline/a3700/mv_ddr_tim.h
+ * https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/blob/master/a3700/mv_ddr_tim.h
  */
 #define A3700_CH0_MC_CTRL2_REG         MVEBU_REGISTER(0x002c4)
 #define A3700_MC_CTRL2_SDRAM_TYPE_MASK 0xf
@@ -79,7 +80,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+       gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
 
        return 0;
 }
@@ -87,7 +88,7 @@ int board_init(void)
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
-       char *ptr = (char *)&default_environment[0];
+       char *ptr = &default_environment[0];
        struct udevice *dev;
        struct mmc *mmc_dev;
        bool ddr4, emmc;
@@ -124,18 +125,17 @@ int board_late_init(void)
 
        /* eMMC is mmc dev num 1 */
        mmc_dev = find_mmc_device(1);
-       emmc = (mmc_dev && mmc_init(mmc_dev) == 0);
+       emmc = (mmc_dev && mmc_get_op_cond(mmc_dev, true) == 0);
 
        /* if eMMC is not present then remove it from DM */
        if (!emmc && mmc_dev) {
                dev = mmc_dev->dev;
                device_remove(dev, DM_REMOVE_NORMAL);
                device_unbind(dev);
+               if (of_live_active())
+                       ofnode_set_enabled(dev_ofnode(dev), false);
        }
 
-       if (env_get("fdtfile"))
-               return 0;
-
        /* Ensure that 'env default -a' set correct value to $fdtfile */
        if (ddr4 && emmc)
                strcpy(ptr, "fdtfile=marvell/armada-3720-espressobin-v7-emmc.dtb");
@@ -146,10 +146,6 @@ int board_late_init(void)
        else
                strcpy(ptr, "fdtfile=marvell/armada-3720-espressobin.dtb");
 
-       /* If $fdtfile was not set explicitly by user then set default value */
-       if (!env_get("fdtfile"))
-               env_set("fdtfile", ptr + sizeof("fdtfile="));
-
        return 0;
 }
 #endif
@@ -261,14 +257,15 @@ int board_xhci_enable(fdt_addr_t base)
        return 0;
 }
 
+#ifdef CONFIG_LAST_STAGE_INIT
 /* Helper function for accessing switch devices in multi-chip connection mode */
-static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
+static int mii_multi_chip_mode_write(struct udevice *bus, int dev_smi_addr,
                                     int smi_addr, int reg, u16 value)
 {
        u16 smi_cmd = 0;
 
-       if (bus->write(bus, dev_smi_addr, 0,
-                      MVEBU_SW_SMI_DATA_REG, value) != 0) {
+       if (dm_mdio_write(bus, dev_smi_addr, MDIO_DEVAD_NONE,
+                         MVEBU_SW_SMI_DATA_REG, value) != 0) {
                printf("Error writing to the PHY addr=%02x reg=%02x\n",
                       smi_addr, reg);
                return -EFAULT;
@@ -279,8 +276,8 @@ static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
                  (1 << SW_SMI_CMD_SMI_OP_OFF) |
                  (smi_addr << SW_SMI_CMD_DEV_ADDR_OFF) |
                  (reg << SW_SMI_CMD_REG_ADDR_OFF);
-       if (bus->write(bus, dev_smi_addr, 0,
-                      MVEBU_SW_SMI_CMD_REG, smi_cmd) != 0) {
+       if (dm_mdio_write(bus, dev_smi_addr, MDIO_DEVAD_NONE,
+                         MVEBU_SW_SMI_CMD_REG, smi_cmd) != 0) {
                printf("Error writing to the PHY addr=%02x reg=%02x\n",
                       smi_addr, reg);
                return -EFAULT;
@@ -290,11 +287,22 @@ static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
 }
 
 /* Bring-up board-specific network stuff */
-int board_network_enable(struct mii_dev *bus)
+int last_stage_init(void)
 {
+       struct udevice *bus;
+       ofnode node;
+
        if (!of_machine_is_compatible("globalscale,espressobin"))
                return 0;
 
+       node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
+       if (!ofnode_valid(node) ||
+           uclass_get_device_by_ofnode(UCLASS_MDIO, node, &bus) ||
+           device_probe(bus)) {
+               printf("Cannot find MDIO bus\n");
+               return 0;
+       }
+
        /*
         * FIXME: remove this code once Topaz driver gets available
         * A3720 Community Board Only
@@ -334,10 +342,12 @@ int board_network_enable(struct mii_dev *bus)
 
        return 0;
 }
+#endif
 
-#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+#ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
        int ret;
        int spi_off;
        int parts_off;
@@ -431,6 +441,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
                return 0;
        }
 
+#endif
        return 0;
 }
 #endif