SPDX: Convert all of our single license tags to Linux Kernel style

[platform/kernel/u-boot.git] / arch / x86 / dts / conga-qeval20-qa3-e3845.dts

diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
index fba089d..c3d1514 100644 (file)
--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -1,12 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
  * Copyright (C) 2016 Stefan Roese <sr@denx.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /dts-v1/;
 
+#include <asm/arch-baytrail/fsp/fsp_configs.h>
 #include <dt-bindings/gpio/x86-gpio.h>
 #include <dt-bindings/interrupt-router/intel-irq.h>
 
@@ -46,6 +46,17 @@
                        pad-offset = <0x3a0>;
                        mode-func = <1>;
                };
+
+               /* Add SMBus PAD configuration */
+               smbus_clk@0 {
+                       pad-offset = <0x580>;
+                       mode-func = <1>;
+               };
+
+               smbus_data@0 {
+                       pad-offset = <0x5a0>;
+                       mode-func = <1>;
+               };
        };
 
        chosen {
@@ -188,6 +199,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0 0x20>;
                                bank-name = "A";
+                               use-lvl-write-cache;
                        };
 
                        gpiob {
@@ -195,6 +207,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0x20 0x20>;
                                bank-name = "B";
+                               use-lvl-write-cache;
                        };
 
                        gpioc {
@@ -202,6 +215,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0x40 0x20>;
                                bank-name = "C";
+                               use-lvl-write-cache;
                        };
 
                        gpiod {
@@ -209,6 +223,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0x60 0x20>;
                                bank-name = "D";
+                               use-lvl-write-cache;
                        };
 
                        gpioe {
@@ -216,6 +231,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0x80 0x20>;
                                bank-name = "E";
+                               use-lvl-write-cache;
                        };
 
                        gpiof {
@@ -223,55 +239,52 @@
                                u-boot,dm-pre-reloc;
                                reg = <0xA0 0x20>;
                                bank-name = "F";
+                               use-lvl-write-cache;
                        };
                };
        };
 
        fsp {
                compatible = "intel,baytrail-fsp";
-               fsp,mrc-init-tseg-size = <0>;
-               fsp,mrc-init-mmio-size = <0x800>;
+               fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
+               fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
                fsp,mrc-init-spd-addr1 = <0xa0>;
                fsp,mrc-init-spd-addr2 = <0xa2>;
-               fsp,emmc-boot-mode = <1>;
+               fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
                fsp,enable-sdio;
                fsp,enable-sdcard;
                fsp,enable-hsuart1;
                fsp,enable-spi;
                fsp,enable-sata;
-               fsp,sata-mode = <1>;
-               fsp,enable-lpe;
-               fsp,lpss-sio-enable-pci-mode;
+               fsp,sata-mode = <SATA_MODE_AHCI>;
+#ifdef CONFIG_USB_XHCI_HCD
+               fsp,enable-xhci;
+#endif
+               fsp,lpe-mode = <LPE_MODE_PCI>;
+               fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
                fsp,enable-dma0;
                fsp,enable-dma1;
-               fsp,enable-i2c0;
-               fsp,enable-i2c1;
-               fsp,enable-i2c2;
-               fsp,enable-i2c3;
-               fsp,enable-i2c4;
-               fsp,enable-i2c5;
-               fsp,enable-i2c6;
                fsp,enable-pwm0;
                fsp,enable-pwm1;
-               fsp,igd-dvmt50-pre-alloc = <2>;
-               fsp,aperture-size = <2>;
-               fsp,gtt-size = <2>;
-               fsp,scc-enable-pci-mode;
-               fsp,os-selection = <4>;
+               fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
+               fsp,aperture-size = <APERTURE_SIZE_256MB>;
+               fsp,gtt-size = <GTT_SIZE_2MB>;
+               fsp,scc-mode = <SCC_MODE_PCI>;
+               fsp,os-selection = <OS_SELECTION_LINUX>;
                fsp,emmc45-ddr50-enabled;
                fsp,emmc45-retune-timer-value = <8>;
                fsp,enable-igd;
                fsp,enable-memory-down;
                fsp,memory-down-params {
                        compatible = "intel,baytrail-fsp-mdp";
-                       fsp,dram-speed = <2>;           /* 2=1333MHz */
-                       fsp,dram-type = <1>;            /* 1=DDR3L */
+                       fsp,dram-speed = <DRAM_SPEED_1333MTS>;
+                       fsp,dram-type = <DRAM_TYPE_DDR3L>;
                        fsp,dimm-0-enable;
                        fsp,dimm-1-enable;
-                       fsp,dimm-width = <1>;           /* 1=x16, 2=x32 */
-                       fsp,dimm-density = <2>;         /* 2=4Gbit */
-                       fsp,dimm-bus-width = <3>;       /* 3=64bits */
-                       fsp,dimm-sides = <0>;           /* 0=1 ranks -> 0x2b */
+                       fsp,dimm-width = <DIMM_WIDTH_X16>;
+                       fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
+                       fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
+                       fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
 
                        /* These following values might need a re-visit */
                        fsp,dimm-tcl = <8>;