*/
#include <common.h>
-#include <malloc.h>
+#include <command.h>
#include <commproc.h>
+#include <malloc.h>
#include <net.h>
-#include <command.h>
+
+#include <phy.h>
DECLARE_GLOBAL_DATA_PTR;
static int mii_discover_phy(struct eth_device *dev);
#endif
-int fec8xx_miiphy_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value);
-int fec8xx_miiphy_write(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value);
+int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg);
+int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value);
static struct ether_fcc_info_s
{
struct ether_fcc_info_s *efis;
int i;
- for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++) {
dev = malloc(sizeof(*dev));
if (dev == NULL)
/* for FEC1 make sure that the name of the interface is the same
as the old one for compatibility reasons */
if (i == 0) {
- sprintf (dev->name, "FEC");
+ strcpy(dev->name, "FEC");
} else {
sprintf (dev->name, "FEC%d",
ether_fcc_info[i].ether_index + 1);
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
- miiphy_register(dev->name,
- fec8xx_miiphy_read, fec8xx_miiphy_write);
+ int retval;
+ struct mii_dev *mdiodev = mdio_alloc();
+ if (!mdiodev)
+ return -ENOMEM;
+ strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
+ mdiodev->read = fec8xx_miiphy_read;
+ mdiodev->write = fec8xx_miiphy_write;
+
+ retval = mdio_register(mdiodev);
+ if (retval < 0)
+ return retval;
#endif
}
return 1;
j = 0;
while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
-#if defined(CONFIG_ICU862)
- udelay(10);
-#else
udelay(1);
-#endif
j++;
}
if (j>=TOUT_LOOP) {
rtx->rxbd[rxIdx].cbd_sc);
#endif
} else {
- uchar *rx = NetRxPackets[rxIdx];
+ uchar *rx = net_rx_packets[rxIdx];
length -= 4;
#if defined(CONFIG_CMD_CDP)
- if ((rx[0] & 1) != 0
- && memcmp ((uchar *) rx, NetBcastAddr, 6) != 0
- && !is_cdp_packet((uchar *)rx))
+ if ((rx[0] & 1) != 0 &&
+ memcmp((uchar *)rx, net_bcast_ethaddr, 6) != 0 &&
+ !is_cdp_packet((uchar *)rx))
rx = NULL;
#endif
/*
* Pass the packet up to the protocol layers.
*/
if (rx != NULL)
- NetReceive (rx, length);
+ net_process_received_packet(rx, length);
}
/* Give the buffer back to the FEC. */
#endif /* !CONFIG_RMII */
-#elif !defined(CONFIG_ICU862)
+#else
/*
* Configure all of port D for MII.
*/
immr->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */
else
immr->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */
-#else
- /*
- * Configure port A for MII.
- */
-
-#if defined(CONFIG_ICU862) && defined(CONFIG_SYS_DISCOVER_PHY)
-
- /*
- * On the ICU862 board the MII-MDC pin is routed to PD8 pin
- * * of CPU, so for this board we need to configure Utopia and
- * * enable PD8 to MII-MDC function
- */
- immr->im_ioport.iop_pdpar |= 0x4080;
#endif
- /*
- * Has Utopia been configured?
- */
- if (immr->im_ioport.iop_pdpar & (0x8000 >> 1)) {
- /*
- * YES - Use MUXED mode for UTOPIA bus.
- * This frees Port A for use by MII (see 862UM table 41-6).
- */
- immr->im_ioport.utmode &= ~0x80;
- } else {
- /*
- * NO - set SPLIT mode for UTOPIA bus.
- *
- * This doesn't really effect UTOPIA (which isn't
- * enabled anyway) but just tells the 862
- * to use port A for MII (see 862UM table 41-6).
- */
- immr->im_ioport.utmode |= 0x80;
- }
-#endif /* !defined(CONFIG_ICU862) */
-
#endif /* CONFIG_ETHER_ON_FEC1 */
} else if (fecidx == 1) {
rxIdx = 0;
txIdx = 0;
- if (!rtx) {
-#ifdef CONFIG_SYS_ALLOC_DPRAM
- rtx = (RTXBD *) (immr->im_cpm.cp_dpmem +
- dpram_alloc_align (sizeof (RTXBD), 8));
-#else
- rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_FEC_BASE);
-#endif
- }
+ if (!rtx)
+ rtx = (RTXBD *)(immr->im_cpm.cp_dpmem + CPM_FEC_BASE);
/*
* Setup Receiver Buffer Descriptors (13.14.24.18)
* Settings:
for (i = 0; i < PKTBUFSRX; i++) {
rtx->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
rtx->rxbd[i].cbd_datlen = 0; /* Reset */
- rtx->rxbd[i].cbd_bufaddr = (uint) NetRxPackets[i];
+ rtx->rxbd[i].cbd_bufaddr = (uint) net_rx_packets[i];
}
rtx->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
/* Setup the pin configuration of the FEC(s)
*/
- for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++)
+ for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++)
fec_pin_init(ether_fcc_info[i].ether_index);
}
* Otherwise they hang in mii_send() !!! Sorry!
*****************************************************************************/
-int fec8xx_miiphy_read(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value)
+int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
+ unsigned short value = 0;
short rdreg; /* register working value */
#ifdef MII_DEBUG
#endif
rdreg = mii_send(mk_mii_read(addr, reg));
- *value = rdreg;
+ value = rdreg;
#ifdef MII_DEBUG
- printf ("0x%04x\n", *value);
+ printf ("0x%04x\n", value);
#endif
- return 0;
+ return value;
}
-int fec8xx_miiphy_write(const char *devname, unsigned char addr,
- unsigned char reg, unsigned short value)
+int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value)
{
#ifdef MII_DEBUG
printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
projects / platform / kernel / u-boot.git / blobdiff