avr32: fixup definitions to ATMEL_BASE_xxx
[platform/kernel/u-boot.git] / arch / avr32 / include / asm / arch-at32ap700x / hardware.h
index 6592c03..9172eef 100644 (file)
@@ -19,8 +19,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
-#ifndef __AT32AP7000_MEMORY_MAP_H__
-#define __AT32AP7000_MEMORY_MAP_H__
+#ifndef __AT32AP7000_HARDWARE_H__
+#define __AT32AP7000_HARDWARE_H__
 
 /* Internal and external memories */
 #define EBI_SRAM_CS0_BASE                      0x00000000
 #define INTERNAL_SRAM_SIZE                     0x00008000
 
 /* Devices on the High Speed Bus (HSB) */
-#define LCDC_BASE                              0xFF000000
-#define DMAC_BASE                              0xFF200000
-#define USB_FIFO                               0xFF300000
+#define LCDC_BASE                                      0xFF000000
+#define DMAC_BASE                                      0xFF200000
+#define USB_FIFO                                       0xFF300000
 
 /* Devices on Peripheral Bus A (PBA) */
-#define SPI0_BASE                              0xFFE00000
-#define SPI1_BASE                              0xFFE00400
-#define TWI_BASE                               0xFFE00800
-#define USART0_BASE                            0xFFE00C00
-#define USART1_BASE                            0xFFE01000
-#define USART2_BASE                            0xFFE01400
-#define USART3_BASE                            0xFFE01800
-#define SSC0_BASE                              0xFFE01C00
-#define SSC1_BASE                              0xFFE02000
-#define SSC2_BASE                              0xFFE02400
-#define PIOA_BASE                              0xFFE02800
-#define PIOB_BASE                              0xFFE02C00
-#define PIOC_BASE                              0xFFE03000
-#define PIOD_BASE                              0xFFE03400
-#define PIOE_BASE                              0xFFE03800
-#define PSIF_BASE                              0xFFE03C00
+#define ATMEL_BASE_SPI0                                0xFFE00000
+#define ATMEL_BASE_SPI1                                0xFFE00400
+#define ATMEL_BASE_TWI0                                0xFFE00800
+#define ATMEL_BASE_USART0                      0xFFE00C00
+#define ATMEL_BASE_USART1                      0xFFE01000
+#define ATMEL_BASE_USART2                      0xFFE01400
+#define ATMEL_BASE_USART3                      0xFFE01800
+#define ATMEL_BASE_SSC0                                0xFFE01C00
+#define ATMEL_BASE_SSC1                                0xFFE02000
+#define ATMEL_BASE_SSC2                                0xFFE02400
+#define ATMEL_BASE_PIOA                                0xFFE02800
+#define ATMEL_BASE_PIOB                                0xFFE02C00
+#define ATMEL_BASE_PIOC                                0xFFE03000
+#define ATMEL_BASE_PIOD                                0xFFE03400
+#define ATMEL_BASE_PIOE                                0xFFE03800
+#define ATMEL_BASE_PSIF                                0xFFE03C00
 
 /* Devices on Peripheral Bus B (PBB) */
-#define SM_BASE                                        0xFFF00000
-#define INTC_BASE                              0xFFF00400
-#define HMATRIX_BASE                           0xFFF00800
-#define TIMER0_BASE                            0xFFF00C00
-#define TIMER1_BASE                            0xFFF01000
-#define PWM_BASE                               0xFFF01400
-#define MACB0_BASE                             0xFFF01800
-#define MACB1_BASE                             0xFFF01C00
-#define DAC_BASE                               0xFFF02000
-#define MMCI_BASE                              0xFFF02400
-#define AUDIOC_BASE                            0xFFF02800
-#define HISI_BASE                              0xFFF02C00
-#define USB_BASE                               0xFFF03000
-#define HSMC_BASE                              0xFFF03400
-#define HSDRAMC_BASE                           0xFFF03800
-#define ECC_BASE                               0xFFF03C00
+#define ATMEL_BASE_SM                          0xFFF00000
+#define ATMEL_BASE_INTC                                0xFFF00400
+#define ATMEL_BASE_HMATRIX                     0xFFF00800
+#define ATMEL_BASE_TIMER0                      0xFFF00C00
+#define ATMEL_BASE_TIMER1                      0xFFF01000
+#define ATMEL_BASE_PWM                         0xFFF01400
+#define ATMEL_BASE_MACB0                       0xFFF01800
+#define ATMEL_BASE_MACB1                       0xFFF01C00
+#define ATMEL_BASE_DAC                         0xFFF02000
+#define ATMEL_BASE_MMCI                                0xFFF02400
+#define ATMEL_BASE_AUDIOC                      0xFFF02800
+#define ATMEL_BASE_HISI                                0xFFF02C00
+#define ATMEL_BASE_USB                         0xFFF03000
+#define ATMEL_BASE_HSMC                                0xFFF03400
+#define ATMEL_BASE_HSDRAMC                     0xFFF03800
+#define ATMEL_BASE_ECC                         0xFFF03C00
 
-#endif /* __AT32AP7000_MEMORY_MAP_H__ */
+#endif /* __AT32AP7000_HARDWARE_H__ */