+commit 2a8dfe08359a1b663418b2faa1da1d7bce34d302
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Mar 21 23:26:15 2007 +0100
+
+ Code cleanup. Update CHANGELOG
+
+commit e6615ecf4eaf4dd52696934aed8f5c6474cfd286
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 21 14:54:29 2007 +0100
+
+ ppc4xx: Fix file mode of include/configs/acadia.h
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d5f4614c9350d9333e575100fb250aab774d0258
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Wed Mar 21 14:41:46 2007 +0100
+
+ SPC1920: fix small clock routing bug
+
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 16c0cc1c82081a493ab87c51980b28336ce1bce8
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 21 13:39:57 2007 +0100
+
+ [PATCH] Add AMCC Acadia (405EZ) eval board support
+
+ This patch adds support for the new AMCC Acadia eval board.
+
+ Please note that this Acadia/405EZ support is still in a beta stage.
+ Still lot's of cleanup needed but we need a preliminary release now.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e01bd218b00af73499331a1a701625a852cd286f
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 21 13:38:59 2007 +0100
+
+ [PATCH] Add AMCC PPC405EZ support
+
+ This patch adds support for the new AMCC 405EZ PPC. It is in
+ preparation for the AMCC Acadia board support.
+
+ Please note that this Acadia/405EZ support is still in a beta stage.
+ Still lot's of cleanup needed but we need a preliminary release now.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 07e82cb2e284a893df6693f2a1337ab2c47bf6a1
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Wed Mar 21 08:45:17 2007 +0100
+
+ [PATCH] TQM8272: dont change the bits given from the HRCW
+ for the SIUMCR and BCR Register.
+ Fix the calculation for the EEprom Size
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 654589873dbafcf104dff133ce0d03a4506e9cc3
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Tue Mar 20 18:16:24 2007 +0800
+
+ [Blackfin][PATCH] Add BF561 EZKIT board support
+
+commit a6154fd1cfd020f6da8527e0365b1020a11a71d0
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 19 22:55:58 2007 +0800
+
+ [Blackfin][PATCH] minor cleanup
+
+commit 389b6bb50f745bf5038ce030300d8a8512e96f79
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Mar 19 13:10:08 2007 +0100
+
+ Remove obsoleted POST files.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8e709bbb2636b5670a8f2b575e138eb1f55773f6
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 19 01:26:11 2007 +0800
+
+ [PATCH] Add flash chip M29W320ET/B support
+
+commit 26bf7deca364a5b33f39e8f14ddd3f4081345015
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 19 01:24:52 2007 +0800
+
+ [Blackfin][PATCH] Add BF537 stamp board support
+
+commit 8423e5e31a7235d05a482627315fb11d49c17bd7
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Mar 16 21:11:42 2007 +0100
+
+ [PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval board
+
+ Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
+ DDR memory are dynamically programmed matching the total size
+ of the equipped memory (DIMM modules).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 76d1466f918b881cda2d259254761e73885093c2
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Mar 13 13:38:05 2007 +0100
+
+ [PATCH] renamed environment variable 'addcon' to 'addcons' for PCI405
+ boards in terms of unification.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit a7090b993d3d4d2221ac3f33e6cb1d1b2ccc6bf0
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Mar 13 16:05:55 2007 +0100
+
+ Make SC3 board build with 'make O='; use 'addcons' consistently
+ (SC3 and Jupiter used to use 'addcon' instead).
+
+ Signed-off-by: Wolfgang Denk wd@denx.de
+
+commit 8502e30a28e492c756ea2d7df0ace026388fce4b
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Tue Mar 13 09:40:59 2007 +0100
+
+ [PATCH] update board config for jupiter Board:
+ added Hush Shell,
+ CONFIG_CMDLINE_EDITING,
+ CFG_ENV_ADDR_REDUND activated
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 0d93de11449390a5984b0236c3612e50f6dbb7e8
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 12 12:11:55 2007 +0800
+
+ [Blackfin][PATCH] minor cleanup
+
+commit bfa5754a58477ac917d21527cd0f079d87cf188e
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 12 01:42:06 2007 +0800
+
+ [Blackfin][PATCH] Fix BUILD_DIR option of MAKEALL building issue
+
+commit 8440bb14581a294375c34b91b42512f9753d1130
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 12 00:25:14 2007 +0800
+
+ [Blackfin][PATCH] code cleanup
+
+commit 8db13d63157811c839d15a313d9f2d2f5fd10af3
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Sat Mar 10 23:49:29 2007 +0800
+
+ [Blackfin][PATCH] code cleanup
+
+commit ef26a08fef928b7bc11ae2c109e638dc3a016d91
+Author: Aubrey.Li <aubrey.adi@gmail.com>
+Date: Fri Mar 9 13:40:56 2007 +0800
+
+ [Blackfin][PATCH-2/2] Common files changed to support bf533 platform
+
+commit 3f0606ad0b5639f7f22848fe5b4574e754d0470f
+Author: Aubrey.Li <aubrey.adi@gmail.com>
+Date: Fri Mar 9 13:38:44 2007 +0800
+
+ [Blackfin]PATCH-1/2]: Remove obsolete blackfin port and add bf533 platform support
+
+commit 992423ab43c2bcf6b704853bd00af77450915e20
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 23:00:08 2007 +0100
+
+ ppc4xx: Fix file mode of sequoia.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit eb92f613556800f7483666db09d9a237ad911d4a
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Mar 8 22:52:51 2007 +0100
+
+ Minor cleanup.
+
+commit 8ce16f55c7b9752af3d8bed84521aec5337e2de1
+Author: John Otken john@softadvances.com <john@softadvances.com>
+Date: Thu Mar 8 09:39:48 2007 -0600
+
+ ppc4xx: Clear Sequoia/Rainier security engine reset bits
+
+ Signed-off-by: John Otken john@softadvances.com <john@softadvances.com>
+
+commit 650a330dd2539130c8c324791e2f9f75aed79d4e
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Mar 8 16:26:52 2007 +0100
+
+ [PATCH] I2C: add some more SPD eeprom decoding for DDR2 modules
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit d9fc703246840c4b268debf48c334ba55c597dc0
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Mar 8 16:25:47 2007 +0100
+
+ [PATCH] I2C: disable flat i2c commands when CONFIG_I2C_CMD_TREE is defined
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit ced5b9029043397348cdc88e0cfcd6b1f629250b
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Mar 8 16:23:11 2007 +0100
+
+ [PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUS
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit d8a8ea5c476d37006fc7f85b7f903142795c8b14
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Mar 8 16:20:32 2007 +0100
+
+ [PATCH] I2C: Add missing default CFG_SPD_BUS_NUM
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit f9fc6a5852a6335840882fa2111925010eea1abe
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Mar 7 15:32:01 2007 +0100
+
+ fixed ethernet phy configuration for plu405 board
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 769104c9356594deb2092e204a39c05b33202d6c
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Mar 8 21:49:27 2007 +0100
+
+ Minor cleanup
+
+commit 00cdb4ce5e1b42248e7e6522ad0da3421b988afa
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 10:13:16 2007 +0100
+
+ [PATCH] Update AMCC Luan 440SP eval board support
+
+ The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
+ inititializition. This includes DDR auto calibration and support
+ for different DIMM modules, instead of the fixed setup used in
+ the earlier version.
+
+ This patch also enables the cache in FLASH for the startup
+ phase of U-Boot (while running from FLASH). After relocating to
+ SDRAM the cache is disabled again. This will speed up the boot
+ process, especially the SDRAM setup, since there are some loops
+ for memory testing (auto calibration).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2f5df47351910a2936c7741cf111855829200943
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 10:10:18 2007 +0100
+
+ [PATCH] Update AMCC Yucca 440SPe eval board support
+
+ The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
+ inititializition. This includes DDR auto calibration and support
+ for different DIMM modules, instead of the fixed setup used in
+ the earlier version.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2721a68a9ea91f1e494649ce68b2577261f578e2
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 10:07:18 2007 +0100
+
+ ppc4xx: Small AMCC Katmai 440SPe update
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit df294497479b1dca6dd86318b2a912f72fede0df
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 10:06:09 2007 +0100
+
+ ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SP
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit fa1aef15bcd47736687be1af544506e90fba545d
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 7 16:43:00 2007 +0100
+
+ [PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board
+
+ Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
+ DDR memory are dynamically programmed matching the total size
+ of the equipped memory (DIMM modules).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e2ebe696818939e2b974628be9c921ea3fe9de13
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 7 16:39:36 2007 +0100
+
+ [PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
+
+ This patch fixes a problem that occurs when 2 DIMM's are
+ used. This problem was first spotted and fixed by Gerald Jackson
+ <gerald.jackson@reaonixsecurity.com> but this patch fixes the
+ problem in a little more clever way.
+
+ This patch also adds the nice functionality to dynamically
+ create the TLB entries for the SDRAM (tlb.c). So we should
+ never run into such problems with wrong (too short) TLB
+ initialization again on these platforms.
+
+ As this feature is new to the "old" 44x SPD DDR driver, it
+ has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 39218433983417b9df087976a79e3f80dd5e83d6
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Mar 7 16:33:44 2007 +0100
+
+ UC101: fix compiler warnings
+
+commit 8d7e2732221bc2d64df14f700c64c23e0a4c3dce
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Mar 7 16:19:46 2007 +0100
+
+ HMI1001: fix build error, cleanup compiler warnings.
+
+commit ad5bb451ade552c44bef9119d907929ebc2c126f
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Mar 6 18:08:43 2007 +0100
+
+ Restructure POST directory to support of other CPUs, boards, etc.
+
+commit a5284efd125967675b2e9c6ef7b95832268ad360
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Mar 6 18:01:47 2007 +0100
+
+ Fix HOSTARCH handling.
+ Patch by Mike Frysinger, Mar 05 2007
+
+commit 07b7b0037aac5102939917d7cbe561b5c0d5aa44
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Mar 6 07:47:04 2007 +0100
+
+ [PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup
+
+ As provided by the AMCC applications team, this patch optimizes the
+ DDR2 setup for 166MHz bus speed. The values provided are also save
+ to use on a "normal" 133MHz PLB bus system. Only the refresh counter
+ setup has to be adjusted as done in this patch.
+
+ For this the NAND booting version had to include the "speed.c" file
+ from the cpu/ppc4xx directory. With this addition the NAND SPL image
+ will just fit into the 4kbytes of program space. gcc version 4.x as
+ provided with ELDK 4.x is needed to generate this optimized code.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 781e026c8aa6f7e9eb5f0e72cc4d20971219b148
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Feb 28 00:02:04 2007 -0600
+
+ mpc83xx: fix implicit declaration of function 'ft_get_prop' warnings
+
+ (cherry picked from c5bf13b02284c3204a723566a9bab700e5059659 commit)
+
+commit 4feab4de7bfc2cb2fed36ad76f93c3a69659bbaf
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Feb 27 23:51:42 2007 -0600
+
+ mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode
+
+ The config value for:
+ * CFG_ACR_PIPE_DEP
+ * CFG_ACR_RPTCNT
+ * CFG_SPCR_TSEC1EP
+ * CFG_SPCR_TSEC2EP
+ * CFG_SCCR_TSEC1CM
+ * CFG_SCCR_TSEC2CM
+
+ Were not being used when setting the appropriate register
+
+ Added:
+ * CFG_SCCR_USBMPHCM
+ * CFG_SCCR_USBDRCM
+ * CFG_SCCR_PCICM
+ * CFG_SCCR_ENCCM
+
+ To allow full config of the SCCR.
+
+ Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
+ that were just bogus.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d51b3cf371cd441030460ef19d36b2924c361b1a
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Feb 22 20:06:57 2007 -0600
+
+ mpc83xx: update [local-]mac-address properties on UEC based devices
+
+ 8360 and 832x weren't updating their [local-]mac-address
+ properties. This patch fixes that.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 61f4f912acbe60776c5e00df1ec94094ce672957
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Feb 13 10:41:42 2007 -0600
+
+ mpc83xx: write MAC address to mac-address and local-mac-address
+
+ Some device trees have a mac-address property, some have local-mac-address,
+ and some have both. To support all of these device trees, this patch
+ updates ftp_cpu_setup() to write the MAC address to mac-address if it exists.
+ This function already updates local-mac-address.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 22d71a71f57fd5d38b27ac3848e50d790360a598
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Feb 27 18:41:08 2007 -0600
+
+ mpc83xx: add command line editing by default
+
+commit 3fc0bd159103b536e1c54c6f4457a09b3aba66ca
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Feb 14 19:50:53 2007 -0600
+
+ mpc83xx: Disable G1TXCLK, G2TXCLK h/w buffers
+
+ Disable G1TXCLK, G2TXCLK h/w buffers. This patch
+ fixes a networking timeout issue with MPC8360EA (Rev.2) PBs.
+
+ Verified on Rev. 1.1, Rev. 1.2, and Rev. 2.0 boards.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+ Signed-off-by: Emilian Medve <Emilian.Medve@freescale.com>
+
+commit d61853cf2472e0b8bcbd131461a93d1c49ff0c1f
+Author: Xie Xiaobo <r63061@freescale.com>
+Date: Wed Feb 14 18:27:17 2007 +0800
+
+ mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xx
+
+ The code supply fixed and SPD initialization for MPC83xx DDR2 Controller.
+ it pass DDR/DDR2 compliance tests.
+
+ Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
+
+commit b110f40bd180c6b560276589beedf753e97c46ce
+Author: Xie Xiaobo <r63061@freescale.com>
+Date: Wed Feb 14 18:27:06 2007 +0800
+
+ mpc83xx: Add the cpu specific code for MPC8360E rev2.0 MDS
+
+ MPC8360E rev2.0 have new spridr,and PVR value,
+ The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM.
+
+ Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
+
+commit 8d172c0f0d85998a256a95b7459a5403a30380ed
+Author: Xie Xiaobo <r63061@freescale.com>
+Date: Wed Feb 14 18:26:44 2007 +0800
+
+ mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDS
+
+ MPC8349E rev3.1 have new spridr,and PVR value,
+ The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM.
+
+ Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
+
+commit f6f5f709e5c8e4564c4dfeecfdf2279244f9c83b
+Author: Joakim Tjernlund <joakim.tjernlund@transmode.se>
+Date: Wed Jan 31 11:04:19 2007 +0100
+
+ mpc83xx: Fix empty i2c reads/writes in fsl_i2c.c
+
+ Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0)
+ which is used to se if an slave will ACK after receiving its address.
+
+ Correct i2c probing to use this method as the old method could upset
+ a slave as it wrote a data byte to it.
+
+ Add a small delay in i2c_init() to let the controller
+ shutdown any ongoing I2C activity.
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 7a78f148d6a7298e4fface680dc7eacd877b1aba
+Author: Timur Tabi <timur@freescale.com>
+Date: Wed Jan 31 15:54:29 2007 -0600
+
+ mpc83xx: Add support for the MPC8349E-mITX-GP
+
+ Add support for the MPC8349E-mITX-GP, a stripped-down version of the
+ MPC8349E-mITX. Bonus features include support for low-boot (BMS bit in
+ HRCW is 0) for the ITX and a README for the ITX and the ITX-GP.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit fab16807adad350f618024350c6950165c247c72
+Author: Timur Tabi <timur@freescale.com>
+Date: Wed Jan 31 15:54:20 2007 -0600
+
+ mpc83xx: Delete sdram_init() for MPC8349E-mITX
+
+ There is no SDRAM on any of the 8349 ITX variants, so function sdram_init()
+ never does anything. This patch deletes it.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit a87c856eb411b9365937d0d4b9c21e46adbe1c14
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Jan 19 10:43:26 2007 +0800
+
+ mpc83xx: Fix the LAW1/3 bug
+
+ The patch solves the alignment problem of the local bus access windows to
+ render accessible the memory bank and PHY registers of UPC 1 (starting at
+ 0xf801 0000). What we actually did was to adjust the sizes of the bus
+ access windows so that the base address alignment requirement would be met.
+
+ Signed-off-by: Chereji Marian <marian.chereji@freescale.com>
+ Signed-off-by: Gridish Shlomi <gridish@freescale.com>
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 97c4b397dce236a7318b304667bf89e59d08b17c
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jan 30 16:15:31 2007 -0600
+
+ mpc83xx: don't hang if watchdog configured on 8360, 832x
+
+ don't hang if watchdog configured on 8360, 832x
+
+ The watchdog programming model is the same across all 83xx devices;
+ make the code reflect that.
+
+commit b70047478570e371ce7223be342ce98afea0f7d6
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jan 30 16:15:21 2007 -0600
+
+ mpc83xx: protect memcpy to bad address if a local-mac-address is missing from dt
+
+ protect memcpy to bad address if a local-mac-address is missing from dt
+
+commit 6752ed088c75c26a89b70c46b7326a4cd6015f29
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jan 30 16:15:04 2007 -0600
+
+ mpc83xx: make 8360 default environment fdt be 8360 (not 8349)
+
+ make 8360 default environment fdt be 8360 (not 8349)
+
+commit a28899c910024a0226331df07207b1038c300c93
+Author: Emilian Medve <Emilian.Medve@freescale.com>
+Date: Tue Jan 30 16:14:50 2007 -0600
+
+ mpc83xx: Fix alternating tx error / tx buffer not ready bug in QE UEC
+
+ The problem is not gcc4 but the code itself. The BD_STATUS() macro can't
+ be used for busy-waiting since it strips the 'volatile' property from
+ the bd variable. gcc3 was working by pure luck.
+
+ This is a follow on patch to "Fix the UEC driver bug of QE"
+
+commit 3e78a31cfe3d3022f46f67eb88e1281d5cc2eb89
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Jan 30 14:08:30 2007 -0600
+
+ mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead
+
+ The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all
+ MPC834X class processors. Change the protections from CONFIG_MPC8349 to
+ CONFIG_MPC834X so they are more generic.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ae246dc6c1937c291014eadd90b6d48c438c7cb0
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Jan 25 13:40:55 2007 -0600
+
+ mpc83xx: add MPC832XEMDS and sbc8349 to MAKEALL
+
+commit 4decd84e8f04279c5cfff7f8e907465ef8d8a3fb
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Jan 24 17:18:37 2007 -0600
+
+ mpc83xx: sort Makefile targets
+
+ reordered targets alphabetically
+
+commit 91e25769771c1164ed63ffca0add49f934ae3343
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Tue Jan 16 11:38:14 2007 -0500
+
+ mpc83xx: U-Boot support for Wind River SBC8349
+
+ I've redone the SBC8349 support to match git-current, which
+ incorporates all the MPC834x updates from Freescale since the 1.1.6
+ release, including the DDR changes.
+
+ I've kept all the SBC8349 files as parallel as possible to the
+ MPC8349EMDS ones for ease of maintenance and to allow for easy
+ inspection of what was changed to support this board. Hence the SBC8349
+ U-Boot has FDT support and everything else that the MPC8349EMDS has.
+
+ Fortunately the Freescale updates added support for boards using CS0,
+ but I had to change spd_sdram.c to allow for board specific settings for
+ the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
+ default if the board doesn't specify a value.)
+
+ Hopefully this should be mergeable as-is and require no whitespace
+ cleanups or similar, but if something doesn't measure up then let me
+ know and I'll fix it.
+
+ Thanks,
+ Paul.
+
+commit 05031db456ab227f3e3752f37b9b812b65bb83ad
+Author: Sam Song <samsongshu@yahoo.com.cn>
+Date: Thu Dec 14 19:03:21 2006 +0800
+
+ mpc83xx: Remove a redundant semicolon in mpc8349itx.c
+
+ A redundant semicolon existed in mpc8349itx.c
+ should be removed.
+
+ Signed-off-by: Sam Song <samsongshu@yahoo.com.cn>
+
+commit f35f358241c549be3f75cfe2eaa642914275b7ba
+Author: Jerry Van Baren <gerald.vanbaren@comcast.net>
+Date: Wed Dec 6 21:23:55 2006 -0500
+
+ mpc83xx: Put the version (and magic) after the HRCW.
+
+ Put the version (and magic) after the HRCW. This puts it in a fixed
+ location in flash, not at the start of flash but as close as we can get.
+
+ Signed-off-by: Jerry Van Baren <vanbaren@cideas.com>
+
+commit 48aecd969171a6e99a55fae04933857787f9a5bd
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Dec 7 21:14:51 2006 +0800
+
+ mpc83xx: Add the MPC832XEMDS board readme
+
+ Add the MPC832XEMDS board readme
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 24c3aca3f1358b113d3215adb5433b156e99f72b
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Dec 7 21:13:15 2006 +0800
+
+ mpc83xx: Add support for the MPC832XEMDS board
+
+ This patch supports DUART, ETH3/4 and PCI etc.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit e080313c32322e15ab5a18eb896a252858c57284
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Dec 7 21:11:58 2006 +0800
+
+ mpc83xx: streamline the 83xx immr head file
+
+ For better format and style, I streamlined the 83xx head files,
+ including immap_83xx.h and mpc83xx.h. In the old head files, 1)
+ duplicated macro definition appear in the both files; 2) the structure
+ of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The
+ macro definition put inside the each structure. So, I cleaned up the
+ structure of QE immr from immap_83xx.h, deleted the duplicated stuff and
+ moved the macro definition to mpc83xx.h, Just like MPC8260.
+
+ CHANGELOG
+
+ *streamline the 83xx immr head file
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit ddd02492f43db5408f5ab9f823b0ba5796e28ef0
+Author: Dave Liu <r63238@freescale.com>
+Date: Wed Dec 6 11:38:17 2006 +0800
+
+ mpc83xx: Fix the UEC driver bug of QE
+
+ The patch prevents the GCC tool chain from striping useful code for
+ optimization. It will make UEC ethernet driver workable, Otherwise the
+ UEC will fail in tx when you are using gcc4.x. but the driver can work
+ when using gcc3.4.3.
+
+ CHANGELOG
+
+ *Prevent the GCC from striping code for optimization, Otherwise the UEC
+ will tx failed when you are using gcc4.x.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit ba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 1 21:11:36 2007 +0100
+
+ [PATCH] Update AMCC Katmai 440SPe eval board support
+
+ This patch updates the recently added Katmai board support. The biggest
+ change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
+ driver.
+
+ Please note, that still some problems are left with some memory
+ configurations. See the driver for more details.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8c12045a3b06c5b6675d3fe02fbc9f545988129a
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 1 07:03:25 2007 +0100
+
+ [PATCH] I2C: Add missing default CFG_RTC_BUS_NUM & CFG_DTT_BUS_NUM
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ccbc7036648e465697ca298ba51e0e76dda352a0
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Feb 28 01:28:53 2007 +0100
+
+ SC3: fix typo in default environment
+
+commit e344568b1b46af85ec32d815586f91bc115d6223
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue Feb 27 20:15:30 2007 +0300
+
+ MCC200: Fixes for update procedure
+
+ - fix logic error in image type handling
+ - make sure file system images (cramfs etc.) get stored in flash
+ with image header stripped so they can be mounted through MTD
+
+commit 743571145b37182757d4e688a77860b36ee77573
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Feb 27 14:26:04 2007 +0100
+
+ Minor code cleanup.
+
+commit 638dd1458bbdc2a55d4b9e25c5c4e1f838a5dc72
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue Feb 27 12:40:16 2007 +0300
+
+ MCC200 update - add LCD Progress Indicator
+
+commit 6c7cac8c4fce0ea2bf8e15ed8658d87974155b44
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Feb 22 07:43:34 2007 +0100
+
+ [PATCH] get_dev() now unconditionally uses manual relocation
+
+ Since the relocation fix is not included yet and we're not sure how
+ it will be added, this patch removes code that required relocation
+ to be fixed for now.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8274ec0bd01d2feb2c7f095eba78d42ea009798b
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Feb 22 07:40:23 2007 +0100
+
+ [PATCH] Change systemace driver to select 8 & 16bit mode
+
+ As suggested by Grant Likely this patch enables the Xilinx SystemACE
+ driver to select 8 or 16bit mode upon startup.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3a197b2fe49d6fa03978e60af2394efe9c70b527
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Wed Feb 21 16:52:31 2007 +0100
+
+ [PATCH v3] Add sync to ensure flash_write_cmd is fully finished
+
+ Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
+ is fully finished. The sync() is defined in each CPU's io.h file. For
+ those CPUs which do not need sync for now, a dummy sync() is defined in
+ their io.h as well.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit da04995c7dc6772013a9a0dc5c767f190c402478
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Feb 21 13:44:34 2007 +0100
+
+ [PATCH] Fix problem in systemace driver (ace_writew instead of ace_write)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 751bb57107d78978ae08e697c3deba816f5be091
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 13:21:57 2007 +0100
+
+ [PATCH] Fix relocation problem with "new" get_dev() function
+
+ This patch enables the "new" get_dev() function for block devices
+ introduced by Grant Likely to be used on systems that still suffer
+ from the relocation problems (manual relocation neede because of
+ problems with linker script).
+
+ Hopefully we can resolve this relocation issue soon for all platform
+ so we don't need this additional code anymore.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d93e2212f962668b3dce091ff5edc33f2347fe37
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 13:17:42 2007 +0100
+
+ [PATCH] Update SystemACE driver for 16bit access
+
+ This patch removes some problems when the Xilinx SystemACE driver
+ is used with 16bit access on an big endian platform (like the
+ AMCC Katmai).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 874bb7b88fe9b4648e1288a387af2e31014a72f3
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 13:15:40 2007 +0100
+
+ [PATCH] Clean up Katmai (440SPe) linker script
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4745acaa1a603b67f6b9b7970365ebadd7d6586f
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:57:08 2007 +0100
+
+ [PATCH] Add support for the AMCC Katmai (440SPe) eval board
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0dc018ece13effc689e47479ea9ebf1c98a507f5
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:51:26 2007 +0100
+
+ [PATCH] I2C: Add support for multiple I2C busses for RTC & DTT
+
+ This patch switches to the desired I2C bus when the date/dtt
+ commands are called. This can be configured using the
+ CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4037ed3b63923cfcec27f784a89057c3cbabcedb
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:43:34 2007 +0100
+
+ [PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support
+
+ This patch adds support for the DDR2 controller used on the
+ 440SP and 440SPe. It is tested on the Katmai (440SPe) eval
+ board and works fine with the following DIMM modules:
+
+ - Corsair CM2X512-5400C4 (512MByte per DIMM)
+ - Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
+ - Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)
+
+ This patch also adds the nice functionality to dynamically
+ create the TLB entries for the SDRAM (tlb.c). So we should
+ never run into such problems with wrong (too short) TLB
+ initialization again on these platforms.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 36d830c9830379045f5daa9f542ac1c990c70068
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:35:42 2007 +0100
+
+ [PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 files
+
+ Since the existing 4xx SPD SDRAM initialization routines for the
+ 405 SDRAM controller and the 440 DDR controller don't have much in
+ common this patch splits both drivers into different files.
+
+ This is in preparation for the 440 DDR2 controller support (440SP/e).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 79b2d0bb2eae09602448f7a7cb56530d2f31e6c6
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:27:08 2007 +0100
+
+ [PATCH] PPC4xx: Add support for multiple I2C busses
+
+ This patch adds support for multiple I2C busses on the PPC4xx
+ platforms. Define CONFIG_I2C_MULTI_BUS in the board config file
+ to make use of this feature.
+
+ It also merges the 405 and 440 i2c header files into one common
+ file 4xx_i2c.h.
+
+ Also the 4xx i2c reset procedure is reworked since I experienced
+ some problems with the first access on the 440SPe Katmai board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit eb867a76238fb38e952c37871b16d0d7fd61c95f
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:45 2007 +0100
+
+ [PATCH 9_9] Use "void *" not "unsigned long *" for block dev read_write buffer pointers
+
+ Block device read/write is anonymous data; there is no need to use a
+ typed pointer. void * is fine. Also add a hook for block_read functions
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 53758fa20e935cc87eeb0519ed365df753a6f289
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:38 2007 +0100
+
+ [PATCH 8_9] Add block_write hook to block_dev_desc_t
+
+ Preparation for future patches which support block device writing
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f4852ebe6ca946a509667eb68be42026f837be76
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:31 2007 +0100
+
+ [PATCH 7_9] Replace ace_readw_ace_writeb functions with macros
+
+ Register read/write does not need to be wrapped in a full function. The
+ patch replaces them with macros.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 3a8ce9af6fcb5744a7851b4440c07688acc40844
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:23 2007 +0100
+
+ [PATCH 6_9] Move common_cmd_ace.c to drivers_systemace.c
+
+ The code in this file is not a command; it is a device driver. Put it in
+ the correct place. There are zero functional changes in this patch, it
+ only moves the file.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 984618f3e7794c783ec8d1511e74c6ee2d69bfe4
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:16 2007 +0100
+
+ [PATCH 5_9] Whitespace fixup on common_cmd_ace.c (using Lindent)
+
+ This patch is in preparation of additional changes to the sysace driver.
+ May as well take this opportunity to fixup the inconsistent whitespace since
+ this file is about to undergo major changes anyway.
+
+ There are zero functional changes in this patch. It only cleans up the
+ the whitespace.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 80ba981d940471fe7e539e64fa3d2bd80002beda
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:07 2007 +0100
+
+ [PATCH 4_4] Remove local implementation of isprint() in ft_build.c
+
+ isprint is already defined in ctype.c
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit c95c4280d751ca078c2ff58228d2f2b44ccf0600
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:00 2007 +0100
+
+ [PATCH 3_9] Move buffer print code from md command to common function
+
+ Printing a buffer is a darn useful thing. Move the buffer print code
+ into print_buffer() in lib_generic/
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 99b0f0fd3fbf2572ae1a7723dd90cffc8e85130a
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:04:52 2007 +0100
+
+ [PATCH 2_4] Use config.h, not xparameters.h, for xilinx targets
+
+ Change the xilinx device drivers and board code to include config.h
+ instead of xparameters.h directly. config.h always includes the
+ correct xparameters file. This change reduces the posibility of
+ including the wrong file when adding a new xilinx board port
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 735dd97b1b20e777d059c7b389fe9d70cd3f80c7
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:04:34 2007 +0100
+
+ [PATCH 1_4] Merge common get_dev() routines for block devices
+
+ Each of the filesystem drivers duplicate the get_dev routine. This change
+ merges them into a single function in part.c
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f5fcc3c20b65554e98a165542c36ee0c610a2d81
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Feb 19 23:09:51 2007 +0100
+
+ MCC200: Software Updater: allow both "ramdisk" and "filesystem" types
+ as root file system images.
+
+commit 489c696ae7211218961d159e43e722d74c36fcbc
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Wed Feb 14 14:30:28 2007 +0300
+
+ MCC200: Extensions to Software Update Mechanism
+
+ Update / extend Software Update Mechanism for MCC200 board:
+
+ - Add support for rootfs image added. The environment variables
+ "rootfs_st" and "rootfs_nd" can be used to override the default
+ values of the image start and end.
+ - Remove excessive key check code.
+ - Code cleanup.
+
+commit 4be23a12f23f1372634edc3215137b09768b7949
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Feb 19 08:23:15 2007 +0100
+
+ [PATCH] Update Sequoia EBC configuration (NOR FLASH)
+
+ As spotted by Matthias Fuchs, the READY input should not be
+ enabled for the NOR FLASH on the Sequoia board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2605e90bf676d48123afe5719a846d2b52b24aac
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Feb 16 07:57:42 2007 +0100
+
+ [PATCH] Added support for the jupiter board.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 497d012e5be0194e1084073d0081eb1a844796b2
+Author: Gary Jennejohn <garyj@pollux.denx.de>
+Date: Mon Feb 12 13:11:50 2007 +0100
+
+ LPC2292: patch from Siemens.
+
+commit b0b1a920aebead0d44146e73676ae9d80fffc8e2
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Feb 10 08:49:31 2007 +0100
+
+ [PATCH] Add missing p3mx.h file to repository (ups)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 53d4a4983fb9b3ae5f7b2f10c599aca2b1b4034a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Fri Feb 9 10:45:42 2007 +0100
+
+ [Motion-PRO] Preliminary support for the Motion-PRO board.
+
+commit 5a753f98c6a01bd1c61a9a3f95e8329a35f62994
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Feb 7 16:51:08 2007 +0100
+
+ [PATCH] Update some AMCC 4xx board config files (set initrd_high)
+
+ Some boards that can have more than 768MBytes of SDRAM need to
+ set "initrd_high", so that the initrd can be accessed by the
+ Linux kernel.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7372ca68227930d03cffa548310524cad5b96733
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Feb 2 12:44:22 2007 +0100
+
+ [PATCH] Correctly display PCI arbiter en-/disabled on some 4xx boards
+
+ Previously the strapping DCR/SDR was read to determine if the internal PCI
+ arbiter is enabled or not. This strapping bit can be overridden, so now
+ the current status is read from the correct DCR/SDR register.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2aa54f651a42d198673318f07a20c89a43e4d197
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Feb 2 12:42:08 2007 +0100
+
+ [PATCH] Change configuration output of Sycamore, Yellowstone & Rainier
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 23744d6b5bf17592eb6a0ef4f318f6089f55993b
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Feb 1 13:22:41 2007 +0100
+
+ [PATCH] Remove PCI-PNP configuration from Sequoia/Rainier config file
+
+ When PCI PNP is enabled the pci pnp configuration routine is called
+ which sets the PCI_CACHE_SIZE_LINE to 8. This seems to generate some
+ problems with some PCI cards. For now disable the PCI PNP configuration.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2902fadade3be7659467e8d074048c6b7068f5c0
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 31 16:56:10 2007 +0100
+
+ [PATCH] Update 440EPx/440GRx cpu detection
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d5ea287b02a6945c3977410e364a879dd1a555c8
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 31 16:38:04 2007 +0100
+
+ [PATCH] Update esd cpci5200 files
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+
+commit 8b7d1f0ab7d7c4fe3160bbf74a7e9690d9f3a3ab
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 31 16:37:34 2007 +0100
+
+ [PATCH] Add support for esd mecp5200 board
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+
+commit 71a4e5fda8b60044ab9f46069fa1cfa26bdd07ff
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 31 12:38:50 2007 +0100
+
+ [PATCH] Remove unneccessary yellowstone board config file
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e802594b6fa1b166308820c276b96dc0d7cc731c
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 30 17:06:10 2007 +0100
+
+ [PATCH] Update Sequoia (440EPx) config file
+
+ The config file now handles the 2nd target, the Rainier (440GRx)
+ evaluation board better. Additionally the PPC input clock was
+ adjusted to match the correct value of 33.0 MHz.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 700200c67e73b83751418abe7815840dca8fd6cb
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 30 17:04:19 2007 +0100
+
+ [PATCH] Merge Yosemite & Yellowstone board ports
+
+ Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR)
+ share one config file and all board specific files. This way we
+ don't have to maintain two different sets of files for nearly
+ identical boards.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1bbf5eae322f5f1f6427ecc3ac13a0cb7dba8ad6
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 30 15:01:49 2007 +0100
+
+ [PATCH] Update Prodrive SCPU (PDNB3 variant) board
+
+ SCPU doesn't use redundant environment in flash.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6304430ed642ea8fa15c9e5af965ac2e033eec45
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 30 12:51:07 2007 +0100
+
+ [PATCH] alpr: Update alpr board config file
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f8db84f132b1e335f20f96138a1f09ed97b08664
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Jan 30 00:50:40 2007 +0100
+
+ LPC2292 SODIMM port coding style cleanup.
+
+commit 6bd2447ee47ee23c18d2b3c7ccd5a20f7626f5b3
+Author: Gary Jennejohn <garyj@pollux.denx.de>
+Date: Wed Jan 24 12:16:56 2007 +0100
+
+ Add port for the lpc2292sodimm evaluation board from EmbeddedArtists
+
+commit 2daf046ba627f85f44195815778140039636244e
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Jan 23 17:22:06 2007 +0100
+
+ [iDMR] Add MTD and JFFS2 support, also add default partition definition.
+
+commit f7db33101fbc9c8f0a10738ce87034875a17aeb9
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Jan 23 14:21:14 2007 +0100
+
+ [iDMR] Flash driver on initialisation write-protects some sectors,
+ currently sectors 0-3. Sector 3 does not need to be protected, though
+ (U-boot occupies sectors 0-1 and the environment sector 2). This commit
+ fixes this, i.e., only sectors 0-2 are protected.
+
+commit 0ed47bb119cd2c4c16edb2548789148f9e6dc9de
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Jan 23 14:11:22 2007 +0100
+
+ [iDMR] Using MII-related commands on iDRM board doesn't work now (e.g.,
+ "mii device" results in "Unexpected exception"). Fixing this properly
+ requires some clean-up in the FEC drivers infrastructure for ColdFire, so
+ this commit disables MII commads for now.
+
+commit 363d1d8f9c99b63daef81f5985cab3fc00edde5c
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Jan 23 13:25:22 2007 +0100
+
+ [ColdFire MCF5271 family] Add CPU detection based on the value of Chip
+ Identification Register (CIR).
+
+commit a4012396645533aef218354eeba754dff0deace8
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Fri Jan 19 23:08:39 2007 +0100
+
+ Minor code cleanup.
+
+commit f539b7ba7d7ef6dd187c8209609001cb1cd95e39
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Jan 19 19:57:10 2007 +0100
+
+ [PATCH] SC3 board: added CFG_CMD_AUTOSCRIPT.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit d0b6e14087ddd8789f224a48e1d33f2a5df4d167
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Jan 19 18:05:26 2007 +0100
+
+ [PATCH] CFI: define CFG_WRITE_SWAPPED_DATA for the CFI-Flash driver
+ if you must swap the bytes between reading/writing.
+ (Needed for the SC3 board)
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 9d8d5a5bfb64768f29a0cb47fc37cd6f4c40e276
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 18 16:05:47 2007 +0100
+
+ [PATCH] Add support for Prodrive SCPU (PDNB3 variant) board
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0057d758e3e874cbe7f24745d0cce8c1cb6c207e
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 18 11:54:52 2007 +0100
+
+ [PATCH] Update Prodrive P3Mx support
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 34167a36c29ee946b727465db5c014746a08e978
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 18 11:48:10 2007 +0100
+
+ [PATCH] Add missing Taishan config file
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cb4820725e9fc409c5cbc8e83054a6ed522d2111
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Thu Jan 18 11:28:51 2007 +0100
+
+ [PATCH] Fix: Compilerwarnings for SC3 board.
+ The EBC Configuration Register is now by CFG_EBC_CFG definable
+ Added JFFS2 support for the SC3 board.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 5fb692cae57d1710c8f52a427cf7f39a37383fcd
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 18 10:25:34 2007 +0100
+
+ [PATCH] Add support for AMCC Taishan PPC440GX eval board
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6d3e0107235aa0e6a6dcb77f9884497280bf85ad
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Jan 16 18:30:50 2007 +0100
+
+ Raname solidcard3 into sc3; add redundant env for sc3
+
+commit 1bbbbdd20fcec9933697000dcf55ff7972622596
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Jan 16 12:46:35 2007 +0100
+
+ Update default environment for Solidcard3
+
+commit 5a5c56986a9ccf71642c8b6374eb18487b15fecd
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jan 15 09:46:29 2007 +0100
+
+ [PATCH] Fix 440SPe rev B detection from previous patch
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a443d31410c571ee8f970da819a44d698fdd6b1f
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Sun Jan 14 13:35:31 2007 +0100
+
+ [FIX] correct I2C Writes for the LM81 Sensor.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 0bba5452835f19a61204edcda3a58112fd8e2208
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sat Jan 13 11:17:10 2007 +0100
+
+ Undo commit 3033ebb2: reset command does not take any arguments
+
+ Haiying Wang's modification to the reset command was broken, undo it.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 95981778cff0038fd9941044d6a3eda810e33258
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 13 08:01:03 2007 +0100
+
+ [PATCH] Update 440SP(e) cpu revisions
+
+ Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 77ddc5b9afb325262fd88752ba430a1dded1f0c7
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 13 07:59:56 2007 +0100
+
+ [PATCH] Update Yellowstone (440GR) to display board rev and PCI bus speed
+
+ Now the board revision and the current PCI bus speed are printed after
+ the board message.
+
+ Also the EBC initialising is now done via defines in the board config
+ file.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 36adff362c2c0141ff8a810d42a7e478f779130f
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 13 07:59:19 2007 +0100
+
+ [PATCH] Update Yosemite (440EP) to display board rev and PCI bus speed
+
+ Now the board revision and the current PCI bus speed are printed after
+ the board message.
+
+ Also the EBC initialising is now done via defines in the board config
+ file.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e0b9ea8c8a294de6a5350ae638879d24b5b709d6
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 13 07:57:51 2007 +0100
+
+ [PATCH] Update Sequoia (440EPx) to display board rev and PCI bus speed
+
+ Now the board revision and the current PCI bus speed are printed after
+ the board message.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ca43ba18e910206ef8063e4b22d282630bff3fd2
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Thu Jan 11 15:44:44 2007 +0100
+
+ Added support for the SOLIDCARD III board from Eurodesign
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 6abaee42621c07e81a2cd189ad4368b5e8c50280
+Author: Reinhard Thies <Reinhard.Thies@web.de>
+Date: Wed Jan 10 14:41:14 2007 +0100
+
+ Adjusted default environment for cam5200 board.
+
+commit bab5a90d4ccc1a46a8127b867fa59028cc623ad9
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Jan 10 15:35:52 2007 +0100
+
+ Update CHANGELOG
+
+commit 787fa15860a57833e50bd30555079a9cd4e519b8
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Jan 10 01:28:39 2007 +0100
+
+ Fix auto_update for MCC200 board.
+
+ The invocation of do_auto_update() is moved to the end of the
+ misc_init_r() function, after the flash mappings have been
+ initialized. Please find attached a patch that implements that
+ change.
+
+ Also correct the decoding of the keypad status. With this update, the
+ key that will trigger the update is Column 2, Row 2.
+
+commit d9384de2f571046e71081bae22b49e3d5ca2e3d5
+Author: Marian Balakowicz <m8@semihalf.com>
+Date: Wed Jan 10 00:26:15 2007 +0100
+
+ CAM5200 flash driver modifications:
+ - use CFI driver (replaces custom flash driver) for main 'cam5200' target
+ - add second build target 'cam5200_niosflash' which still uses custom driver
+
+commit 67fea022fa957f59653b5238c7496f80a6b70432
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 16:02:48 2007 +0100
+
+ SPC1920: cleanup memory contoller setup
+
+commit 8fc2102faa23593c80381437c09f7745a14deb40
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 14:57:14 2007 +0100
+
+ Fix the cpu speed setup to work with all boards.
+
+commit 9295acb77481cf099ef9b40e1fa2d145b3c7490c
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 14:57:13 2007 +0100
+
+ SPC1920: add support for the FM18L08 Ramtron FRAM
+
+commit 38ccd2fdf3364a53fe80e9b365303ecdafc9e223
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 14:57:13 2007 +0100
+
+ SPC1920: update the HPI register addresses to work with the second
+ generation of hardware
+
+commit 5921e5313fc3eadd42770c2b99badd7fae5ecf1e
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:13 2007 +0100
+
+ Miscellanious spc1920 related cleanups
+
+commit e4c2d37adc8bb1bf69dcf600cbc6c75f916a6120
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 14:57:12 2007 +0100
+
+ SPC1920 GO/NOGO led should be set to color red in U-Boot
+
+commit 0be62728aac459ba268d6d752ed49ec0e2bc7348
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:12 2007 +0100
+
+ Add support for the DS3231 RTC
+
+commit 8139567b60d678584b05f0718a681f2047c5e14f
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:11 2007 +0100
+
+ SMC1 uses external CLK4 instead of BRG on spc1920
+
+commit d8d9de1a02fbd880b613d607143d1f57342affc7
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:10 2007 +0100
+
+ Update the SPC1920 CMB PLD driver
+
+commit 3f34f869162750e5e999fd140f884f5de952bcfe
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:10 2007 +0100
+
+ Add / enable I2C support on the spc1920 board
+
+commit d28707dbce1e9ac2017ad051da4133bf22b4204f
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:10 2007 +0100
+
+ Add support for the tms320671x host port interface (HPI)
+
+commit f4eb54529bb3664c3a562e488b460fe075f79d67
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sun Jan 7 00:13:11 2007 +0100
+
+ Prepare for release 1.2.0
+
+commit f07ae7a9daef27a3d0213a4f3fe39d5342173c02
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 6 15:58:09 2007 +0100
+
+ [PATCH] 44x: Fix problem with DDR controller setup (refresh rate)
+
+ This patch fixes a problem with an incorrect setup for the refresh
+ timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f16c1da9577f06c5fc08651a4065537407de4635
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 6 15:56:13 2007 +0100
+
+ [PATCH] Update ALPR board files
+
+ This update brings the ALPR board support to the newest version.
+ It also fixes a problem with the NAND driver.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cd1d937f90250a32988c37b2b4af8364d25de8ed
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jan 5 11:46:05 2007 +0100
+
+ [PATCH] nand: Fix problem with oobsize calculation
+
+ Here the description from Brian Brelsford <Brian_Brelsford@dell.com>:
+
+ The Hynix part returns a 0x1d in the 4th ID byte. The Samsung part
+ returns a 0x15. In the code fragment below bits [1:0] determine the
+ page size, it is ANDed via "(extid & 0x3)" then shifted out. The
+ next field is also ANDed with 0x3. However this is a one bit field
+ as defined in the Hynix and Samsung parts in the 4th ID byte that
+ determins the oobsize, not a two bit field. It works on Samsung as
+ bits[3:2] are 01. However for the Hynix there is a 11 in these two
+ bits, so the oob size gets messed up.
+
+ I checked the correct linux code and the suggested fix from Brian is
+ also available in the linux nand mtd driver.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a78bc443ae5a4a8ba87590587d5e35bf5a787b2e
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jan 5 10:40:36 2007 +0100
+
+ [PATCH] Clear PLB4A0_ACR[WRP] on Sequoia (440EPx)
+
+ This fix will make the MAL burst disabling patch for the Linux
+ EMAC driver obsolete.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 023889838282b6237b401664f22dd22dfba2c066
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jan 5 10:38:05 2007 +0100
+
+ [PATCH] Add DDR2 optimization code for Sequoia (440EPx) board
+
+ This code will optimize the DDR2 controller setup on a board specific
+ basis.
+
+ Note: This code doesn't work right now on the NAND booting image for the
+ Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cce4acbb68398634b8d011ed7bb0d12269c84230
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Thu Dec 28 19:08:21 2006 +0100
+
+ Few V38B changes:
+ - fix a typo in V38B config file
+ - move watchdog initialisation earlier in the boot process
+ - add "wdt=off" to default kernel command line (disables kernel watchdog)
+
+commit 92eb729bad876725aeea908d2addba0800620840
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Dec 27 01:26:13 2006 +0100
+
+ Fix bug in adaption of Stefano Babic's CFI driver patch.
+
+commit 9c0f42ecfe25f7ffce8ec7a815f03864d723ffe3
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sun Dec 24 01:42:57 2006 +0100
+
+ Minor code cleanup.
+
+commit d784fdb05900ada3686d5778783e1fb328e9fb66
+Author: Stefano Babic <sbabic@denx.de>
+Date: Tue Dec 12 00:22:42 2006 +0100
+
+ Fix cfi failure with Spansion Flash (Spansion Flash Devices have a different offset to go into CFI mode)
+
+commit 1b3c360c235dc684ec06c2d5f183f0a282ce45e2
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Dec 22 14:29:40 2006 +0100
+
+ [PATCH] Fix sequoia flash autodetection (finally correct)
+
+ Now 32MByte and 64MByte FLASH is know to work and other
+ configurations should work too.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 82e5236a8b719543643fd26d5827938ab2b94818
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Fri Dec 22 10:30:26 2006 +0100
+
+ Minor code cleanup; update CHANGELOG.
+
+commit fa23044564091f05d9695beb7b5b9a931e7f41a4
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Thu Dec 21 17:17:02 2006 +0100
+
+ Added support for the TQM8272 board from TQ
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 6dedf3d49dd14c3bf541c8ecee7ffaac5f0e1d6c
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Thu Dec 21 16:14:48 2006 +0100
+
+ [PATCH] Add support for the UC101 board from MAN.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit c84bad0ef60e7055ab0bd49b93069509cecc382a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Dec 20 00:29:43 2006 +0100
+
+ Fix to make the baudrate changes immediate for the MCF52x2 family.
+
+commit daa6e418bcc0c717752e8de939c213c790286096
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Dec 20 00:27:32 2006 +0100
+
+ Preliminary support for the iDMR board (ColdFire).
+
+commit cdb97a6678826f85e7c69eae6a1c113d034c9b10
+Author: Andrei Safronov <safronov@pollux.denx.de>
+Date: Fri Dec 8 16:23:08 2006 +0100
+
+ automatic update mechanism
+
+commit dd520bf314c7add4183c5191692180f576f96b60
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Nov 30 18:02:20 2006 +0100
+
+ Code cleanup.
+
+commit 8d9a8610b8256331132227e9e6585c6bd5742787
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Nov 30 01:54:07 2006 +0100
+
+ Code cleanup. Update CHANGELOG.
+
+commit 726e90aacf0b1ecb0e7055be574622fbe3e450ba
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Wed Nov 29 16:23:42 2006 +0100
+
+ [PATCH] [MPC52xx] Use IPB bus frequency for SOC peripherals
+
+ The soc node of the mpc52xx needs to be loaded with the IPB bus frequency,
+ not the XLB frequency.
+
+ This patch depends on the previous patches for MPC52xx device tree support
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+ Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
+
+commit 1eac2a71417b6675b11aace72102a2e7fde8f5c6
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 29 15:42:37 2006 +0100
+
+ [PATCH] Add support for Prodrive P3M750 & P3M7448 (P3Mx) boards
+
+ This patch adds support for the Prodrive P3M750 (PPC750 & MV64460)
+ and the P3M7448 (MPC7448 & MV64460) PMC modules. Both modules are
+ quite similar and share the same board directory "prodrive/p3mx"
+ and the same config file "p3mx.h".
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1bdd46832aeb569f5e04b1f20f64318525b6525a
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 29 12:53:15 2006 +0100
+
+ [PATCH] common/cmd_elf.c: Enable loadaddr as parameter in bootvx command
+
+ In the bootvx command the load address was only read from the env
+ variable "loadaddr" and not optionally passed as paramter as described
+ in the help. This is fixed with this patch. The behaviour is now the
+ same as in the bootelf command.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4e26f1074c3ac1bd8fd094f0dc4a1c4a0b15a592
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 29 12:03:57 2006 +0100
+
+ [PATCH] include/ppc440.h minor error affecting interrupts
+
+ Fixed include/ppc440.c for UIC address Bug
+
+ Corrects bug affecting the addresses for the universal interrupt
+ controller UIC2 and UIC3 on the PPC440 Epx, GRx, and SPE chips.
+
+ Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1939d969443ccf316cab2bf32ab1027d4db5ba1a
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Tue Nov 28 16:17:27 2006 -0600
+
+ Make fsl-i2c not conflict with SOFT I2C
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 14198bf768fdc958e3c1afd2404e5262208e98d7
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Tue Nov 28 16:17:18 2006 -0600
+
+ Fix I2C master address initialization.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit cf3d045e51ca8dcc6cf759827140861d6ac25c04
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Nov 28 23:31:19 2006 -0600
+
+ Assign maintainers for mpc8349emds and mpc8360emds
+
+ Dave for mpc8360emds, and me for mpc8349emds.
+
+commit 1aa934c81b77f2080d3ca4b226eab67b17a33961
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Nov 28 23:28:33 2006 -0600
+
+ Eliminate gcc 4 'used uninitialized' warnings in drivers/qe/uccf.c
+
+ give initial values for reg_num, shift, p_cmxucr in ucc_set_clk_src
+ since they are passed by reference to ucc_get_cmxucr_reg and assigned.
+
+commit e857a5bdb3954b896c0920cb9d8d2b1b9c107ce5
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Nov 28 12:09:35 2006 -0600
+
+ mpc83xx: Miscellaneous code style fixes
+
+ Implement various code style fixes and similar changes.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit e59581c56ab5d6e0207ddac3b2c1d55cb36ec706
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 28 17:55:49 2006 +0100
+
+ [PATCH] Enable the IceCube/lite5200 variants to pass a device tree to Linux.
+
+ This patch adds the code and configuration necessary to boot with an
+ arch/powerpc Linux kernel.
+
+ Signed-off-by: Grant Likely <grant.likely@gmail.com>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit e732faec95a83cb468b4850ae807c8301dde8f6a
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 28 16:09:24 2006 +0100
+
+ [PATCH] PPC4xx: 440SP Rev. C detection added
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e7f3e9ff01fbd7fa72eb42a9675fbed6bc4736b0
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 28 11:04:45 2006 +0100
+
+ [PATCH] nand: Fix patch merge problem
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 58e3b14c18ed3288ceef8d086946dbf3df64ccf2
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 28 11:04:45 2006 +0100
+
+ [PATCH] nand: Fix patch merge problem
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4f4b602ec7524a032bdf3c6d28c7f525a4a67eaa
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Nov 27 22:53:53 2006 +0100
+
+ Update CHANGELOG
+
+commit f6e495f54cdb8fe340b9c03deab40ad746d52fae
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 17:43:25 2006 +0100
+
+ [PATCH] 4xx_enet.c: Correct the setting of zmiifer register
+
+ Patch below corrects the setting of the zmiifer register, it was
+ overwritting the register rather than ORing the settings.
+
+ Signed-off-by: Neil Wilson <NWilson@airspan.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d1a72545296800b7e219f93104ad5836f0003d66
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 17:34:10 2006 +0100
+
+ [PATCH] Select NAND embedded environment from board configuration
+
+ The current NAND Bootloader setup forces the environment
+ variables to be in line with the bootloader. This change
+ enables the configuration to be made in the board include
+ file instead so that it can be individually enabled.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 15784862857c3c2214498defcfed84ff137fb81e
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 17:22:19 2006 +0100
+
+ [PATCH] nand_wait() timeout fixes
+
+ Two fixes for the nand_wait() function in
+ drivers/nand/nand_base.c:
+
+ 1. Use correct timeouts. The original timeouts in Linux
+ source are 400ms and 20ms not 40s and 20s
+
+ 2. Return correct error value in case of timeout. 0 is
+ interpreted as OK.
+
+ Signed-off-by: Rui Sousa <rui.sousa@laposte.net>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit da5553b095bf04f4f109ad7e565dae3aba47b230
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 17:04:06 2006 +0100
+
+ [PATCH] Allow CONFIG_OF_FLAT_TREE to boot a non-arch/powerpc kernel
+
+ This patch allows an arch/ppc kernel to be booted by just passing 1 or 2
+ arguments to bootm. It removes the getenv("disable_of") test that used
+ to be used for this purpose.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit a9398e018593782c5fa7d0741955fc1256b34c1e
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Nov 27 15:32:42 2006 +0100
+
+ Minor code cleanup. Update CHANGELOG.
+
+commit 1729b92cde575476684bffe819d0b7791b57bff2
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:52:04 2006 +0100
+
+ [PATCH] 4xx: Fix problem with board specific reset code (now for real)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cc5ee8a92a0e3ca6f727af71b8fd206460c7afd7
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:49:51 2006 +0100
+
+ [PATCH] alpr: remove unused board specific flash driver
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1f94d162e2b5f0edc28d9fb11482502c44d218e1
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:48:41 2006 +0100
+
+ [PATCH] 4xx: Fix problem with board specific reset code
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ec0c2ec725aec9524a177a77ce75559e644a931a
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:46:06 2006 +0100
+
+ [PATCH] Remove testing 4xx enet PHY setup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1c2ce2262069510f31c7d3fd7efd3d58b8c0c148
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:12:17 2006 +0100
+
+ [PATCH] Update Prodrive ALPR board support (440GX)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit 78d620ebb5871d252270dedfad60c6568993b780
Author: Wolfgang Denk <wd@atlas.denx.de>
Date: Thu Nov 23 22:58:58 2006 +0100
This fixes get_ram_size() problems on MPC5200 Rev. B boards.
+commit be5e61815d5a1fac290ce9c0ef09cb6a8e4288fa
+Author: Timur Tabi <timur@freescale.com>
+Date: Fri Nov 3 19:15:00 2006 -0600
+
+ mpc83xx: Update 83xx to use fsl_i2c.c
+
+ Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete
+ cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
+ Added multiple I2C bus support to fsl_i2c.c.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit d239d74b1c937984bc519083a8e7de373a390f06
+Author: Timur Tabi <timur@freescale.com>
+Date: Fri Nov 3 12:00:28 2006 -0600
+
+ mpc83xx: Replace CFG_IMMRBAR with CFG_IMMR
+
+ Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
+ tree matches the other 8xxx trees.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit f7fb2e703ec9688541416962724adff70a7322cb
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Nov 2 19:47:11 2006 -0600
+
+ mpc83xx: Lindent and clean up cpu/mpc83xx/speed.c
+
+commit 90f30a710a3c619b5405860a686c4ddfc495d4b6
+Author: Dave Liu <daveliu@freescale.com>
+Date: Thu Nov 2 18:05:50 2006 -0600
+
+ mpc83xx: Fix the incorrect dcbz operation
+
+ The 834x rev1.x silicon has one CPU5 errata.
+
+ The issue is when the data cache locked with
+ HID0[DLOCK], the dcbz instruction looks like no-op inst.
+
+ The right behavior of the data cache is when the data cache
+ Locked with HID0[DLOCK], the dcbz instruction allocates
+ new tags in cache.
+
+ The 834x rev3.0 and later and 8360 have not this bug inside.
+
+ So, when 834x rev3.0/8360 are working with ECC, the dcbz
+ instruction will corrupt the stack in cache, the processor will
+ checkstop reset.
+
+ However, the 834x rev1.x can work with ECC with these code,
+ because the sillicon has this cache bug. The dcbz will not
+ corrupt the stack in cache.
+ Really, it is the fault code running on fault sillicon.
+
+ This patch fix the incorrect dcbz operation. Instead of
+ CPU FP writing to initialise the ECC.
+
+ CHANGELOG:
+ * Fix the incorrect dcbz operation instead of CPU FP
+ writing to initialise the ECC memory. Otherwise, it
+ will corrupt the stack in cache, The processor will checkstop
+ reset.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit bf0b542d6773a5a1cbce77691f009b06d9aeb57d
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Nov 1 00:10:40 2006 -0600
+
+ mpc83xx: add OF_FLAT_TREE bits to 83xx boards
+
+ add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and
+ STDOUT_PATH configuration bits to mpc8349emds,
+ mpc8349itx, and mpc8360emds board code.
+
+ redo environment to use bootm with the fdtaddr
+ for booting ARCH=powerpc kernels by default,
+ and provide default fdtaddr values.
+
+commit 48041365b3420589ad464ebc7752e0053538b729
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Nov 1 00:07:25 2006 -0600
+
+ mpc83xx: change ft code to modify local-mac-address property
+
+ Update 83xx OF code to update local-mac-address properties
+ for ethernet instead of the obsolete 'address' property.
+
+commit 9ca880a250870a7d55754291b5591d2b5fe89b54
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Oct 31 21:23:16 2006 -0600
+
+ mpc83xx: Fix dual I2C support for the MPC8349ITX, MPC8349EMDS, TQM834x, and MPC8360EMDS
+
+ This patch also adds an improved I2C set_speed(), which handles all clock
+ frequencies.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit ac4b5622ce050b5ee1e154b98df630d778661632
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 31 19:54:59 2006 -0600
+
+ mpc83xx: add the README.mpc8360emds
+
+ add doc/README.mpc8360emds to accompany the new board support
+
+commit 7737d5c658c606f999dfbe3e86b0fed49e5c50ef
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 3 12:11:15 2006 -0600
+
+ mpc83xx: add QE ethernet support
+
+ this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
+
+commit 5f8204394e39bbe8cd9f08b8f8d145b6c01f7c73
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 3 19:33:44 2006 -0600
+
+ mpc83xx: Add MPC8360EMDS basic board support
+
+ Add support for the Freescale MPC8360EMDS board.
+ Includes DDR, DUART, Local Bus, PCI.
+
+commit 23892e49352de74f7fac36ff90bb1be143d195e3
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 31 19:30:40 2006 -0600
+
+ mpc83xx: add the QUICC Engine (QE) immap file
+
+ common QE immap file. Also required for 8360.
+
+commit b701652a4992bdcc62fb1a6038a85beef9e55da4
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 31 19:25:38 2006 -0600
+
+ mpc83xx: Add 8360 specifics to 83xx immap
+
+ Mainly add QE device dependencies, with appropriate 8360 protection.
+ Lindent also run.
+
+commit 988833324a7fda482c8ac3ca23eb539f8232e404
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Oct 31 19:14:41 2006 -0600
+
+ mpc83xx: Fix PCI, USB, bootargs for MPC8349E-mITX
+
+ PREREQUISITE PATCHES:
+
+ * This patch can only be applied after the following patches have been applied:
+
+ 1) DNX#2006092142000015 "Add support for the MPC8349E-mITX 1/2"
+ 2) DNX#2006092142000024 "Add support for the MPC8349E-mITX 2/2"
+
+ CHANGELOG:
+
+ * For the 8349E-mITX, fix some size values in pci_init_board(), enable
+ the clock for the 2nd USB board (Linux kernel will hang otherwise),
+ and fix the CONFIG_BOOTARGS macro.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 2ad6b513b31070bd0c003792ed1c3e7f5d740357
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Oct 31 18:44:42 2006 -0600
+
+ mpc83xx: Add support for the MPC8349E-mITX
+
+ PREREQUISITE PATCHES:
+
+ * This patch can only be applied after the following patches have been applied:
+
+ 1) DNX#2006090742000024 "Add support for multiple I2C buses"
+ 2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
+ 3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
+ 4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
+ 5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
+
+ CHANGELOG:
+
+ * Add support for the Freescale MPC8349E-mITX reference design platform.
+ The second TSEC (Vitesse 7385 switch) is not supported at this time.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 183da6d9b446cc12123455844ad1187e2375626f
+Author: Ben Warren <bwarren@qstreams.com>
+Date: Tue Sep 12 10:15:53 2006 -0400
+
+ Additional MPC8349 support for multibus i2c
+
+ Hello,
+
+ Here is a patch for a file that was accidentally left out of a previous
+ attempt.
+
+ It accompanies the patch with ticket DNX#2006090742000024
+
+ CHANGELOG:
+ Change PCI initialization to use new multi-bus I2C API.
+
+ regards,
+ Ben
+
+commit b24f119d672b709d153ff2ac091d4aa63ec6877d
+Author: Ben Warren <bwarren@qstreams.com>
+Date: Thu Sep 7 16:51:04 2006 -0400
+
+ Multi-bus I2C implementation of MPC834x
+
+ Hello,
+
+ Attached is a patch implementing multiple I2C buses on the MPC834x CPU
+ family and the MPC8349EMDS board in particular.
+ This patch requires Patch 1 (Add support for multiple I2C buses).
+ Testing was performed on a 533MHz board.
+
+ /*** Note: This patch replaces ticket DNX#2006083042000027 ***/
+
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+ CHANGELOG:
+ Implemented driver-level code to support two I2C buses on the
+ MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds
+ are 50kHz, 100kHz and 400kHz on each bus.
+
+ regards,
+ Ben
+
+commit bb99ad6d8257bf828f150d40f507b30d80a4a7ae
+Author: Ben Warren <bwarren@qstreams.com>
+Date: Thu Sep 7 16:50:54 2006 -0400
+
+ Add support for multiple I2C buses
+
+ Hello,
+
+ Attached is a patch providing support for multiple I2C buses at the
+ command level. The second part of the patch includes an implementation
+ for the MPC834x CPU and MPC8349EMDS board.
+
+ /*** Note: This patch replaces ticket DNX#2006083042000018 ***/
+
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+ Overview:
+
+ 1. Include new 'i2c' command (based on USB implementation) using
+ CONFIG_I2C_CMD_TREE.
+
+ 2. Allow multiple buses by defining CONFIG_I2C_MULTI_BUS. Note that
+ the commands to change bus number and speed are only available under the
+ new 'i2c' command mentioned in the first bullet.
+
+ 3. The option CFG_I2C_NOPROBES has been expanded to work in multi-bus
+ systems. When CONFIG_I2C_MULTI_BUS is used, this option takes the form
+ of an array of bus-device pairs. Otherwise, it is an array of uchar.
+
+ CHANGELOG:
+ Added new 'i2c' master command for all I2C interaction. This is
+ conditionally compiled with CONFIG_I2C_CMD_TREE. New commands added for
+ setting I2C bus speed as well as changing the active bus if the board
+ has more than one (conditionally compiled with
+ CONFIG_I2C_MULTI_BUS). Updated NOPROBE logic to handle multiple buses.
+ Updated README.
+
+ regards,
+ Ben
+
+commit bed85caf872714ebf53013967a695c9d63acfc68
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Oct 31 18:13:36 2006 -0600
+
+ mpc83xx: Add support for Errata DDR6 on MPC 834x systems
+
+ CHANGELOG:
+
+ * Errata DDR6, which affects all current MPC 834x processors, lists changes
+ required to maintain compatibility with various types of DDR memory. This
+ patch implements those changes.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit afd6e470f639883002c7c59d562690a5cb0f4865
+Author: Timur Tabi <timur@freescale.com>
+Date: Wed Oct 25 18:45:23 2006 -0500
+
+ mpc83xx: fix TQM build by defining a CFG_FLASH_SIZE for it
+
+commit 31068b7c4abeefcb2c8fd4fbeccc8ec6c6d0475a
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Aug 22 17:07:00 2006 -0500
+
+ mpc83xx: Add support for variable flash memory sizes on 83xx systems
+
+ CHANGELOG:
+
+ * On 83xx systems, use the CFG_FLASH_SIZE macro to program the LBC local access
+ window registers, instead of using a hard-coded value of 8MB.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 2fc34ae66e73fa7841d1a006dc1b5dcbc1f78965
+Author: Tanya Jiang <tanya.jiang@freescale.com>
+Date: Thu Aug 3 18:38:13 2006 +0800
+
+ mpc83xx: Unified TQM834x variable names with 83xx and consolidated macros
+
+ Unified TQM834x variable names with 83xx and consolidated macro
+ in preparation for the 8360 and other upcoming 83xx devices.
+
+ Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
+
+commit f6eda7f80ccc13d658020268c507d7173cf2e8aa
+Author: Dave Liu <daveliu@freescale.com>
+Date: Wed Oct 25 14:41:21 2006 -0500
+
+ mpc83xx: Changed to unified mpx83xx names and added common 83xx changes
+
+ Incorporated the common unified variable names and the changes in preparation
+ for releasing mpc8360 patches.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 3894c46c27c64891f93ac04edde86a9fa9758d92
+Author: Tanya Jiang <tanya.jiang@freescale.com>
+Date: Thu Aug 3 18:36:02 2006 +0800
+
+ mpc83xx: Fix missing build for mpc8349emds pci.c
+
+ Make pci build for mpc8349emds
+
+ Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
+
+commit 09a81ff740b29deea1e2ab08a3c2ac136c2e6219
+Author: Tanya Jiang <tanya.jiang@freescale.com>
+Date: Thu Aug 3 18:39:49 2006 +0800
+
+ mpc83xx: Removed unused file resetvec.S for mpc83xx cpu
+
+ Removed unused file resetvec.S for mpc83xx cpu
+
+ Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
+
+commit 04f899fc465c3e44f2b55ecc70618f5696fc0ddf
+Author: Nick Spence <Nick.Spence@freescale.com>
+Date: Sat Sep 30 00:32:59 2006 -0700
+
+ NAND Flash verify across block boundaries
+
+ This patch addresses a problem when CONFIG_MTD_NAND_VERIFY_WRITE is
+ defined
+ and the write crosses a block boundary. The pointer to the verification
+ buffer (bufstart) is not being updated to reflect the starting of the
+ new
+ block so the verification of the second block fails.
+
+ CHANGELOG:
+
+ * Fix NAND FLASH page verification across block boundaries
+
+commit f484dc791a3932537213c43c654cc1295c64b84c
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Thu Sep 7 07:39:46 2006 -0700
+
+ Added RGMII support to the TSECs and Marvell 881111 Phy
+
+ Added a phy initialization to adjust the RGMII RX and TX timing
+ Always set the R100 bit in 100 BaseT mode regardless of the TSEC mode
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+
commit c59200443072353044aa4bf737a5a60f9a9af231
Author: Wolfgang Denk <wd@pollux.denx.de>
Date: Thu Nov 2 15:15:01 2006 +0100
If a Multi-Image file contains a third image we try to use it as a
device tree. The device tree image is assumed to be uncompressed in the
- image file. We automatically allocate space for the device tree in memory
+ image file. We automatically allocate space for the device tree in memory
and provide an 8k pad to allow more than a reasonable amount of growth.
Additionally, a device tree that was contained in flash will now automatically
Fix whitespace and 80-col issues.
+commit 5c912cb1c31266c66ca59b36f9b6f87296421d75
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 7 11:36:51 2006 +0200
+
+ CFG_NAND_QUIET_TEST added to not warn upon missing NAND device
+ Patch by Stefan Roese, 07 Oct 2006
+
+commit 5bc528fa4da751d472397b308137238a6465afd2
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 7 11:35:25 2006 +0200
+
+ Update ALPR code (NAND support working now)
+ Patch by Stefan Roese, 07 Oct 2006
+
+commit 77d5034847d328753b80c46b83f960a14a26f40e
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 7 11:33:03 2006 +0200
+
+ Remove compile warnings in fpga code
+ Patch by Stefan Roese, 07 Oct 2006
+
+commit f3443867e90d2979a7dd1c65b0d537777e1f9850
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 7 11:30:52 2006 +0200
+
+ Add CONFIG_BOARD_RESET to configure board specific reset function
+ Patch by Stefan Roese, 07 Oct 2006
+
commit f55df18187e7a45cb73fec4370d12135e6691ae1
Author: John Traill <john.traill@freescale.com>
Date: Fri Sep 29 08:23:12 2006 +0100
Signed-off-by: Matthew McClintock <msm@freescale.com>
+commit 899620c2d66d4eef3b2a0034d062e71d45d886c9
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 15 14:22:35 2006 +0200
+
+ Add initial support for the ALPR board from Prodrive
+ NAND needs some additional testing
+ Patch by Heiko Schocher, 15 Aug 2006
+
+commit f0ff4692ff3372dec55074a8eb444943ab095abb
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 15 14:15:51 2006 +0200
+
+ Add FPGA Altera Cyclone 2 support
+ Patch by Heiko Schocher, 15 Aug 2006
+
commit fecf1c7e4de1b2779edc18742b91c22bdc32b68b
Author: Jon Loeliger <jdl@freescale.com>
Date: Mon Aug 14 15:33:38 2006 -0500
projects / platform / kernel / u-boot.git / blobdiff