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(parent: b7186c0) | patch
pinctrl: starfive: jh7110: Correct the ioconfig register address and bit definitions
authorHal Feng <hal.feng@starfivetech.com>
Fri, 3 Mar 2023 03:28:28 +0000 (11:28 +0800)
committerHal Feng <hal.feng@starfivetech.com>
Thu, 16 Mar 2023 06:25:09 +0000 (14:25 +0800)
commit627614f95e7f7883c3ab20cafd6bab2c4a813b8e
tree22ba3d73942f71e018c21e162f8417047518a70ftree | snapshot
parentb7186c0f3b4c457e363c7d027019a7e9eb9e3069commit | diff
pinctrl: starfive: jh7110: Correct the ioconfig register address and bit definitions

1. Correct the io_conf_reg address when pin number >= PAD_QSPI_SCLK.
2. The pull-down bit is the fourth bit, so the mask is 0x10.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c diff | blob | history
include/dt-bindings/pinctrl/starfive,jh7110-pinfunc.h diff | blob | history
Domain: System / Kernel;