}
input_->SetRegister(esp.code(), reinterpret_cast<intptr_t>(frame->sp()));
input_->SetRegister(ebp.code(), reinterpret_cast<intptr_t>(frame->fp()));
+ simd128_value_t zero = {{0.0, 0.0}};
for (int i = 0; i < DoubleRegister::NumAllocatableRegisters(); i++) {
- input_->SetDoubleRegister(i, 0.0);
+ input_->SetSIMD128Register(i, zero);
}
// Fill the frame content from the actual data on the frame.
}
-void Deoptimizer::CopyDoubleRegisters(FrameDescription* output_frame) {
+void Deoptimizer::CopySIMD128Registers(FrameDescription* output_frame) {
if (!CpuFeatures::IsSupported(SSE2)) return;
for (int i = 0; i < XMMRegister::kNumAllocatableRegisters; ++i) {
- double double_value = input_->GetDoubleRegister(i);
- output_frame->SetDoubleRegister(i, double_value);
+ simd128_value_t xmm_value = input_->GetSIMD128Register(i);
+ output_frame->SetSIMD128Register(i, xmm_value);
}
}
// Save all general purpose registers before messing with them.
const int kNumberOfRegisters = Register::kNumRegisters;
- const int kDoubleRegsSize = kDoubleSize *
- XMMRegister::kNumAllocatableRegisters;
- __ sub(esp, Immediate(kDoubleRegsSize));
+ const int kXMMRegsSize = kSIMD128Size *
+ XMMRegister::kNumAllocatableRegisters;
+ __ sub(esp, Immediate(kXMMRegsSize));
if (CpuFeatures::IsSupported(SSE2)) {
CpuFeatureScope scope(masm(), SSE2);
for (int i = 0; i < XMMRegister::kNumAllocatableRegisters; ++i) {
XMMRegister xmm_reg = XMMRegister::FromAllocationIndex(i);
- int offset = i * kDoubleSize;
- __ movsd(Operand(esp, offset), xmm_reg);
+ int offset = i * kSIMD128Size;
+ __ movups(Operand(esp, offset), xmm_reg);
}
}
__ pushad();
const int kSavedRegistersAreaSize = kNumberOfRegisters * kPointerSize +
- kDoubleRegsSize;
+ kXMMRegsSize;
// Get the bailout id from the stack.
__ mov(ebx, Operand(esp, kSavedRegistersAreaSize));
__ pop(Operand(ebx, offset));
}
- int double_regs_offset = FrameDescription::double_registers_offset();
+ int xmm_regs_offset = FrameDescription::simd128_registers_offset();
if (CpuFeatures::IsSupported(SSE2)) {
CpuFeatureScope scope(masm(), SSE2);
- // Fill in the double input registers.
+ // Fill in the xmm input registers.
for (int i = 0; i < XMMRegister::kNumAllocatableRegisters; ++i) {
- int dst_offset = i * kDoubleSize + double_regs_offset;
- int src_offset = i * kDoubleSize;
- __ movsd(xmm0, Operand(esp, src_offset));
- __ movsd(Operand(ebx, dst_offset), xmm0);
+ int dst_offset = i * kSIMD128Size + xmm_regs_offset;
+ int src_offset = i * kSIMD128Size;
+ __ movups(xmm0, Operand(esp, src_offset));
+ __ movups(Operand(ebx, dst_offset), xmm0);
}
}
__ fnclex();
// Remove the bailout id, return address and the double registers.
- __ add(esp, Immediate(kDoubleRegsSize + 2 * kPointerSize));
+ __ add(esp, Immediate(kXMMRegsSize + 2 * kPointerSize));
// Compute a pointer to the unwinding limit in register ecx; that is
// the first stack slot not part of the input frame.
CpuFeatureScope scope(masm(), SSE2);
for (int i = 0; i < XMMRegister::kNumAllocatableRegisters; ++i) {
XMMRegister xmm_reg = XMMRegister::FromAllocationIndex(i);
- int src_offset = i * kDoubleSize + double_regs_offset;
- __ movsd(xmm_reg, Operand(ebx, src_offset));
+ int src_offset = i * kSIMD128Size + xmm_regs_offset;
+ __ movups(xmm_reg, Operand(ebx, src_offset));
}
}
}
+double FrameDescription::GetDoubleRegister(unsigned n) const {
+ ASSERT(n < ARRAY_SIZE(simd128_registers_));
+ return simd128_registers_[n].d[0];
+}
+
+
+void FrameDescription::SetDoubleRegister(unsigned n, double value) {
+ ASSERT(n < ARRAY_SIZE(simd128_registers_));
+ simd128_registers_[n].d[0] = value;
+}
+
+
#undef __