#define ARM64_DEFINE_FP_STATICS
-#include "src/arm64/instructions-arm64.h"
#include "src/arm64/assembler-arm64-inl.h"
+#include "src/arm64/instructions-arm64.h"
namespace v8 {
namespace internal {
static uint64_t RotateRight(uint64_t value,
unsigned int rotate,
unsigned int width) {
- ASSERT(width <= 64);
+ DCHECK(width <= 64);
rotate &= 63;
return ((value & ((1UL << rotate) - 1UL)) << (width - rotate)) |
(value >> rotate);
static uint64_t RepeatBitsAcrossReg(unsigned reg_size,
uint64_t value,
unsigned width) {
- ASSERT((width == 2) || (width == 4) || (width == 8) || (width == 16) ||
+ DCHECK((width == 2) || (width == 4) || (width == 8) || (width == 16) ||
(width == 32));
- ASSERT((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits));
+ DCHECK((reg_size == kWRegSizeInBits) || (reg_size == kXRegSizeInBits));
uint64_t result = value & ((1UL << width) - 1UL);
for (unsigned i = width; i < reg_size; i *= 2) {
result |= (result << i);
offset = ImmBranch() << kInstructionSizeLog2;
} else {
// Load literal (offset from PC).
- ASSERT(IsLdrLiteral());
+ DCHECK(IsLdrLiteral());
// The offset is always shifted by 2 bits, even for loads to 64-bits
// registers.
offset = ImmLLiteral() << kInstructionSizeLog2;
void Instruction::SetPCRelImmTarget(Instruction* target) {
// ADRP is not supported, so 'this' must point to an ADR instruction.
- ASSERT(IsAdr());
+ DCHECK(IsAdr());
- int target_offset = DistanceTo(target);
+ ptrdiff_t target_offset = DistanceTo(target);
Instr imm;
if (Instruction::IsValidPCRelOffset(target_offset)) {
imm = Assembler::ImmPCRelAddress(target_offset);
} else {
PatchingAssembler patcher(this,
PatchingAssembler::kAdrFarPatchableNInstrs);
- patcher.PatchAdrFar(target);
+ patcher.PatchAdrFar(target_offset);
}
}
void Instruction::SetBranchImmTarget(Instruction* target) {
- ASSERT(IsAligned(DistanceTo(target), kInstructionSize));
+ DCHECK(IsAligned(DistanceTo(target), kInstructionSize));
Instr branch_imm = 0;
uint32_t imm_mask = 0;
ptrdiff_t offset = DistanceTo(target) >> kInstructionSizeLog2;
void Instruction::SetImmLLiteral(Instruction* source) {
- ASSERT(IsAligned(DistanceTo(source), kInstructionSize));
+ DCHECK(IsAligned(DistanceTo(source), kInstructionSize));
ptrdiff_t offset = DistanceTo(source) >> kLoadLiteralScaleLog2;
Instr imm = Assembler::ImmLLiteral(offset);
Instr mask = ImmLLiteral_mask;
// xzr and Register are not defined in that header. Consider adding
// instructions-arm64-inl.h to work around this.
uint64_t InstructionSequence::InlineData() const {
- ASSERT(IsInlineData());
+ DCHECK(IsInlineData());
uint64_t payload = ImmMoveWide();
// TODO(all): If we extend ::InlineData() to support bigger data, we need
// to update this method too.