if env.Bit('bitcode') and not env.Bit('pnacl_generate_pexe'):
env.AddBiasForPNaCl()
env.PNaClForceNative()
+testsuites = ['small_tests', 'sel_ldr_tests', 'nonpexe_tests']
infoleak_sources = ['test_infoleak.c']
if env.Bit('target_arm') and not env.Bit('pnacl_generate_pexe'):
infoleak_sources.append('test_infoleak_arm.S')
-elif env.Bit('target_mips32'):
+elif env.Bit('target_mips32') and not env.Bit('pnacl_generate_pexe'):
infoleak_sources.append('test_infoleak_mips.S')
nexe = env.ComponentProgram('test_infoleak', infoleak_sources,
node = env.CommandSelLdrTestNacl('test_infoleak.out', nexe)
env.AddNodeToTestSuite(node,
- ['small_tests', 'sel_ldr_tests'],
+ testsuites,
'run_infoleak_test',
# Valgrind apparently doesn't implement
# stmxcsr/ldmxcsr correctly. stmxcsr seems to do
EXTRA_LIBS=['${NONIRT_LIBS}'])
node = env.CommandSelLdrTestNacl('test_fpu_control_word.out', nexe)
env.AddNodeToTestSuite(node,
- ['small_tests', 'sel_ldr_tests'],
+ testsuites,
'run_fpu_control_word_test',
# Valgrind apparenty doesn't implement
# fnstcw;fldcw correctly.