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ARM: vexpress: Check master site in daughterboard's sysctl operations
authorPawel Moll <pawel.moll@arm.com>
Tue, 12 Jun 2012 15:14:03 +0000 (16:14 +0100)
committerPawel Moll <pawel.moll@arm.com>
Thu, 12 Jul 2012 15:16:56 +0000 (16:16 +0100)
commitd927daf5c81c9b6bf2d6a83dc4c8c60268930ee5
treee0a45cf8833d54d2b811b1b5a9635b3b8c844084tree | snapshot
parentef5911966d2312478a74e93d993cd623a869ab10commit | diff
ARM: vexpress: Check master site in daughterboard's sysctl operations

With recent enough motherboard firmware, core tile can be fitted
in either of the two daughterboard sites. The non-DT tile code for
V2P-CA9 did not check that when configuring DVI output nor setting
CLCD pixel clock.

Fixed now, providing "get master site" API in motherboard's code.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>
arch/arm/mach-vexpress/ct-ca9x4.c diff | blob | history
arch/arm/mach-vexpress/include/mach/motherboard.h diff | blob | history
arch/arm/mach-vexpress/v2m.c diff | blob | history
Domain: System / Uncategorized;