unsigned int pad;
};
+/* Indicate exynos specific vblank flags */
+enum e_drm_exynos_vblank {
+ _DRM_VBLANK_EXYNOS_VIDI = 2,
+};
+
/* indicate cache units. */
enum e_drm_exynos_gem_cache_sel {
EXYNOS_DRM_L1_CACHE = 1 << 0,
};
struct drm_exynos_g2d_set_cmdlist {
- struct drm_exynos_g2d_cmd *cmd;
- struct drm_exynos_g2d_cmd *cmd_gem;
+ __u64 cmd;
+ __u64 cmd_gem;
__u32 cmd_nr;
__u32 cmd_gem_nr;
/* for g2d event */
+ __u64 event_type;
__u64 user_data;
- __u32 event_type;
- __u32 reserved;
};
struct drm_exynos_g2d_exec {
* @version: version of this structure.
* @ipp_id: id of ipp driver.
* @count: count of ipp driver.
+ * @writeback: flag of writeback supporting.
* @flip: flag of flip supporting.
* @degree: flag of degree information.
* @csc: flag of csc supporting.
* @crop: flag of crop supporting.
* @scale: flag of scale supporting.
+ * @refresh_min: min hz of refresh.
+ * @refresh_max: max hz of refresh.
* @crop_min: crop min resolution.
* @crop_max: crop max resolution.
* @scale_min: scale min resolution.
__u32 version;
__u32 ipp_id;
__u32 count;
+ __u32 writeback;
__u32 flip;
__u32 degree;
__u32 csc;
__u32 crop;
__u32 scale;
+ __u32 refresh_min;
+ __u32 refresh_max;
+ __u32 reserved;
struct drm_exynos_sz crop_min;
struct drm_exynos_sz crop_max;
struct drm_exynos_sz scale_min;
};
/* definition of buffer */
-enum drm_exynos_ipp_buf {
+enum drm_exynos_ipp_buf_type {
IPP_BUF_ENQUEUE,
IPP_BUF_DEQUEUE,
};
* A structure for ipp buffer operations.
*
* @ops_id: operation directions.
- * @buf: definition of buffer.
+ * @buf_type: definition of buffer.
* @prop_id: id of property.
* @buf_id: id of buffer.
* @handle: Y, Cb, Cr each planar handle.
*/
struct drm_exynos_ipp_queue_buf {
enum drm_exynos_ops_id ops_id;
- enum drm_exynos_ipp_buf buf;
+ enum drm_exynos_ipp_buf_type buf_type;
__u32 prop_id;
__u32 buf_id;
__u32 handle[EXYNOS_DRM_PLANAR_MAX];
enum drm_exynos_ipp_ctrl ctrl;
};
+/* type of hdmi audio */
+enum drm_exynos_hdmi_type {
+ HDMI_TYPE_I2S,
+ HDMI_TYPE_SPDIF,
+ HDMI_TYPE_MAX,
+};
+
+/* codec of hdmi audio */
+enum drm_exynos_hdmi_codec {
+ HDMI_CODEC_PCM,
+ HDMI_CODEC_AC3,
+ HDMI_CODEC_MP3,
+ HDMI_CODEC_WMA,
+ HDMI_CODEC_MAX,
+};
+
+/**
+ * A structure for hdmi audio enable.
+ *
+ * @type: audio type list.
+ * @codec: audio codec list.
+ * @enable: enable or disable audio.
+ */
+struct drm_exynos_hdmi_audio {
+ enum drm_exynos_hdmi_type type;
+ enum drm_exynos_hdmi_codec codec;
+ __u32 enable;
+ __u32 reserved;
+};
+
#define DRM_EXYNOS_GEM_CREATE 0x00
#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01
#define DRM_EXYNOS_GEM_MMAP 0x02
#define DRM_EXYNOS_IPP_GET_PROPERTY 0x30
#define DRM_EXYNOS_IPP_SET_PROPERTY 0x31
#define DRM_EXYNOS_IPP_QUEUE_BUF 0x32
-#define DRM_EXYNOS_IPP_CMD_CTRL 0x38
+#define DRM_EXYNOS_IPP_CMD_CTRL 0x33
+/* HDMI - Audio */
+#define DRM_EXYNOS_HDMI_AUDIO 0x40
#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
#define DRM_IOCTL_EXYNOS_IPP_CMD_CTRL DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_IPP_CMD_CTRL, struct drm_exynos_ipp_cmd_ctrl)
+#define DRM_IOCTL_EXYNOS_HDMI_AUDIO DRM_IOWR(DRM_COMMAND_BASE + \
+ DRM_EXYNOS_HDMI_AUDIO, struct drm_exynos_hdmi_audio)
+
/* EXYNOS specific events */
#define DRM_EXYNOS_G2D_EVENT 0x80000000
#define DRM_EXYNOS_IPP_EVENT 0x80000001
* Platform Specific Structure for DRM based HDMI core.
*
* @is_v13: set if hdmi version 13 is.
+ * @hdcp_dev: device point to specific cec driver.
+ * @cec_dev: device point to specific cec driver.
* @cfg_hpd: function pointer to configure hdmi hotplug detection pin
* @get_hpd: function pointer to get value of hdmi hotplug detection pin
* @extcon_name: name of extcon for detect MHL cable state.
*/
struct exynos_drm_hdmi_pdata {
bool is_v13;
+ struct device *hdcp_dev;
+ struct device *cec_dev;
void (*cfg_hpd)(bool external);
int (*get_hpd)(void);
#ifdef CONFIG_EXTCON
FIMC_EXYNOS_4210,
FIMC_EXYNOS_4212,
FIMC_EXYNOS_4412,
+ FIMC_EXYNOS_4412_R2,
};
/**