tizen 2.3.1 release

[external/opencore-amr.git] / opencore / codecs_v2 / audio / gsm_amr / amr_nb / common / include / basic_op_arm_gcc_v5.h

diff --git a/opencore/codecs_v2/audio/gsm_amr/amr_nb/common/include/basic_op_arm_gcc_v5.h b/opencore/codecs_v2/audio/gsm_amr/amr_nb/common/include/basic_op_arm_gcc_v5.h
index 1abc4fa..5752171 100644 (file)
--- a/opencore/codecs_v2/audio/gsm_amr/amr_nb/common/include/basic_op_arm_gcc_v5.h
+++ b/opencore/codecs_v2/audio/gsm_amr/amr_nb/common/include/basic_op_arm_gcc_v5.h
@@ -112,7 +112,7 @@ extern "C"
         L_sum = 32-bit sum of L_var1 and L_var2 (Word32)
     */
 
-    __inline Word32 L_add(register Word32 L_var1, register Word32 L_var2, Flag *pOverflow)
+    static inline Word32 L_add(register Word32 L_var1, register Word32 L_var2, Flag *pOverflow)
     {
         register Word32 ra = L_var1;
         register Word32 rb = L_var2;
@@ -120,7 +120,7 @@ extern "C"
 
         OSCL_UNUSED_ARG(pOverflow);
 
-        asm volatile("qadd %0, %1, %2"
+        __asm__ volatile("qadd %0, %1, %2"
              : "=r"(result)
                              : "r"(ra), "r"(rb)
                             );
@@ -149,7 +149,7 @@ extern "C"
      Returns:
         L_diff = 32-bit difference of L_var1 and L_var2 (Word32)
     */
-    __inline Word32 L_sub(Word32 L_var1, Word32 L_var2, Flag *pOverflow)
+    static inline Word32 L_sub(Word32 L_var1, Word32 L_var2, Flag *pOverflow)
 {
         register Word32 ra = L_var1;
         register Word32 rb = L_var2;
@@ -157,7 +157,7 @@ extern "C"
 
         OSCL_UNUSED_ARG(pOverflow);
 
-        asm volatile("qsub %0, %1, %2"
+        __asm__ volatile("qsub %0, %1, %2"
              : "=r"(result)
                              : "r"(ra), "r"(rb)
                             );
@@ -197,12 +197,12 @@ extern "C"
 
         OSCL_UNUSED_ARG(pOverflow);
 
-        asm volatile("smulbb %0, %1, %2"
+        __asm__ volatile("smulbb %0, %1, %2"
              : "=r"(result)
                              : "r"(rb), "r"(rc)
                             );
 
-        asm volatile("qdadd %0, %1, %2"
+        __asm__ volatile("qdadd %0, %1, %2"
              : "=r"(rc)
                              : "r"(ra), "r"(result)
                             );
@@ -232,7 +232,7 @@ extern "C"
         L_product = 32-bit product of L_var1 and L_var2 (Word32)
     */
 
-    __inline Word32 L_mult(Word16 var1, Word16 var2, Flag *pOverflow)
+    static inline Word32 L_mult(Word16 var1, Word16 var2, Flag *pOverflow)
 {
         register Word32 ra = var1;
         register Word32 rb = var2;
@@ -241,12 +241,12 @@ extern "C"
 
         OSCL_UNUSED_ARG(pOverflow);
 
-        asm volatile("smulbb %0, %1, %2"
+        __asm__ volatile("smulbb %0, %1, %2"
              : "=r"(product)
                              : "r"(ra), "r"(rb)
                             );
 
-        asm volatile("qadd %0, %1, %2"
+        __asm__ volatile("qadd %0, %1, %2"
              : "=r"(result)
                              : "r"(product), "r"(product)
                             );
@@ -277,7 +277,7 @@ extern "C"
      Returns:
         result = 32-bit result of L_var3 - (var1 * var2)
     */
-    __inline Word32 L_msu(Word32 L_var3, Word16 var1, Word16 var2, Flag *pOverflow)
+    static inline Word32 L_msu(Word32 L_var3, Word16 var1, Word16 var2, Flag *pOverflow)
 {
         register Word32 ra = L_var3;
         register Word32 rb = var1;
@@ -287,12 +287,12 @@ extern "C"
 
         OSCL_UNUSED_ARG(pOverflow);
 
-        asm volatile("smulbb %0, %1, %2"
+        __asm__ volatile("smulbb %0, %1, %2"
              : "=r"(product)
                              : "r"(rb), "r"(rc)
                             );
 
-        asm volatile("qdsub %0, %1, %2"
+        __asm__ volatile("qdsub %0, %1, %2"
              : "=r"(result)
                              : "r"(ra), "r"(product)
                             );
@@ -338,44 +338,44 @@ extern "C"
 
         OSCL_UNUSED_ARG(pOverflow);
 
-        asm volatile("smulbb %0, %1, %2"
+        __asm__ volatile("smulbb %0, %1, %2"
              : "=r"(L_product)
                              : "r"(ra), "r"(rc)
                             );
-        asm volatile("mov %0, #0"
+        __asm__ volatile("mov %0, #0"
              : "=r"(result)
                     );
 
-        asm volatile("qdadd %0, %1, %2"
+        __asm__ volatile("qdadd %0, %1, %2"
              : "=r"(L_sum)
                              : "r"(result), "r"(L_product)
                             );
 
-        asm volatile("smulbb %0, %1, %2"
+        __asm__ volatile("smulbb %0, %1, %2"
              : "=r"(product32)
                              : "r"(ra), "r"(rd)
                             );
 
-        asm volatile("mov %0, %1, ASR #15"
+        __asm__ volatile("mov %0, %1, ASR #15"
              : "=r"(ra)
                              : "r"(product32)
                             );
-        asm volatile("qdadd %0, %1, %2"
+        __asm__ volatile("qdadd %0, %1, %2"
              : "=r"(L_product)
                              : "r"(L_sum), "r"(ra)
                             );
 
-        asm volatile("smulbb %0, %1, %2"
+        __asm__ volatile("smulbb %0, %1, %2"
              : "=r"(product32)
                              : "r"(rb), "r"(rc)
                             );
 
-        asm volatile("mov %0, %1, ASR #15"
+        __asm__ volatile("mov %0, %1, ASR #15"
              : "=r"(rb)
                              : "r"(product32)
                             );
 
-        asm volatile("qdadd %0, %1, %2"
+        __asm__ volatile("qdadd %0, %1, %2"
              : "=r"(L_sum)
                              : "r"(L_product), "r"(rb)
                             );
@@ -417,29 +417,29 @@ extern "C"
 
         OSCL_UNUSED_ARG(pOverflow);
 
-        asm volatile("smulbb %0, %1, %2"
+        __asm__ volatile("smulbb %0, %1, %2"
              : "=r"(L_product)
                              : "r"(ra), "r"(rc)
                             );
-        asm volatile("mov %0, #0"
+        __asm__ volatile("mov %0, #0"
              : "=r"(result)
                     );
 
-        asm volatile("qdadd %0, %1, %2"
+        __asm__ volatile("qdadd %0, %1, %2"
              : "=r"(L_product)
                              : "r"(result), "r"(L_product)
                             );
 
-        asm volatile("smulbb %0, %1, %2"
+        __asm__ volatile("smulbb %0, %1, %2"
              : "=r"(result)
                              : "r"(rb), "r"(rc)
                             );
 
-        asm volatile("mov %0, %1, ASR #15"
+        __asm__ volatile("mov %0, %1, ASR #15"
              : "=r"(ra)
                              : "r"(result)
                             );
-        asm volatile("qdadd %0, %1, %2"
+        __asm__ volatile("qdadd %0, %1, %2"
              : "=r"(result)
                              : "r"(L_product), "r"(ra)
                             );
@@ -468,7 +468,7 @@ extern "C"
      Returns:
         product = 16-bit limited product of var1 and var2 (Word16)
     */
-    __inline Word16 mult(Word16 var1, Word16 var2, Flag *pOverflow)
+    static inline Word16 mult(Word16 var1, Word16 var2, Flag *pOverflow)
 {
         register Word32 ra = var1;
         register Word32 rb = var2;
@@ -477,12 +477,12 @@ extern "C"
 
         OSCL_UNUSED_ARG(pOverflow);
 
-        asm volatile(
+        __asm__ volatile(
             "smulbb %0, %1, %2"
     : "=r"(temp)
                     : "r"(ra), "r"(rb)
                 );
-        asm volatile(
+        __asm__ volatile(
             "qadd %0, %1, %2\n\t"
             "mov %0, %0, asr #16"
     : "=&r*i"(product)
@@ -492,33 +492,33 @@ extern "C"
         return ((Word16) product);
     }
 
-    __inline Word32 amrnb_fxp_mac_16_by_16bb(Word32 L_var1, Word32 L_var2, Word32 L_var3)
+    static inline Word32 amrnb_fxp_mac_16_by_16bb(Word32 L_var1, Word32 L_var2, Word32 L_var3)
 {
         register Word32 ra = L_var1;
         register Word32 rb = L_var2;
         register Word32 rc = L_var3;
         Word32 result;
 
-        asm volatile("smlabb %0, %1, %2, %3"
+        __asm__ volatile("smlabb %0, %1, %2, %3"
              : "=r"(result)
                              : "r"(ra), "r"(rb), "r"(rc)
                             );
         return (result);
     }
 
-    __inline Word32 amrnb_fxp_msu_16_by_16bb(Word32 L_var1, Word32 L_var2, Word32 L_var3)
+    static inline Word32 amrnb_fxp_msu_16_by_16bb(Word32 L_var1, Word32 L_var2, Word32 L_var3)
 {
         register Word32 ra = L_var1;
         register Word32 rb = L_var2;
         register Word32 rc = L_var3;
         Word32 result;
 
-        asm volatile("rsb %0, %1, #0"
+        __asm__ volatile("rsb %0, %1, #0"
              : "=r"(ra)
                              : "r"(ra)
                             );
 
-        asm volatile("smlabb %0, %1, %2, %3"
+        __asm__ volatile("smlabb %0, %1, %2, %3"
              : "=r"(result)
                              : "r"(ra), "r"(rb), "r"(rc)
                             );