phy: cadence: Sierra: Update single link PCIe register configuration
[platform/kernel/u-boot.git] / drivers / phy / cadence /
drwxr-xr-x   ..
-rw-r--r-- 298 Kconfig
-rw-r--r-- 130 Makefile
-rw-r--r-- 42502 phy-cadence-sierra.c
-rw-r--r-- 73041 phy-cadence-torrent.c