ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit
[platform/kernel/u-boot.git] / drivers / ddr /
drwxr-xr-x   ..
-rw-r--r-- 69 Kconfig
drwxr-xr-x - altera
drwxr-xr-x - fsl
drwxr-xr-x - imx
drwxr-xr-x - marvell
drwxr-xr-x - microchip