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[Arm64/Windows] Make r2r green in CI
2018-02-24 Steve MacLean[Arm64/Windows] Make r2r green in CI
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2018-02-14 Steve MacLean[Arm64] Additional Insert comments
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2018-02-12 Steve MacLeanInsert contain extract
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2018-02-12 Steve MacLeanAdd TestInsert
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2018-02-12 Steve MacLeanImprove diagnostics
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2018-02-12 Steve MacLean[Arm64] Add Simd HWIntrinsic test
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2018-02-09 Steve MacLean[Arm64] Implement Simd.Insert
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2018-02-09 Steve MacLeanFix JIT.SIMD.VectorUtil.CheckValue<T>
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2018-02-07 Steve MacLean[Arm64] Remove SIMD hacks to get*TypeForStruct
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2018-01-30 Steve MacLeanCORINFO_HELP_THROW_TYPE_NOT_SUPPORTED
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2018-01-30 Steve MacLeanCreate hwintrinsic.cpp
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2018-01-26 Steve MacLean[Arm64] Initial HWIntrinsic implementation
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2018-01-19 Steve MacLean[Arm64] Set Instruction set flags
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2018-01-19 Steve MacLean[Arm64] Remove irregular vector not handling
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2018-01-19 Steve MacLean[Arm64] Add compare vector to zero emitters
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2018-01-15 Steve MacLean[Arm64] Use is16Byte
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2018-01-04 Steve MacLean[Arm64] Add Vector64 HW Intrinsic support
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2018-01-03 Steve MacLeanNormalize lsra.h line endings
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2018-01-03 Steve MacLean[Arm64] getBaseTypeAndSizeOfSIMDType
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2017-12-08 Steve MacLean[Arm64] SIMDIntrinsicGetItem contain mem op1
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2017-12-08 Steve MacLean[Arm64] Define ISA feature flags
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2017-11-29 Steve MacLean[Arm64] Fix UNROLL_LIMIT logic
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2017-11-29 Steve MacLean[ARM64] Align Compiler::lvaStressLclFldCB padding
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2017-11-29 Steve MacLean[Arm64] SIMD genMultiRegCallStoreToLocal add missing...
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2017-11-29 Steve MacLean[Arm64] Use REG_IP1 for genEpilogRestoreReg*
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2017-11-23 Steve MacLean[Arm64] Allow IsContainableMemoryOp() use
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2017-11-22 Steve MacLean[Arm64] Assign temps to GT_SIMD arguments
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2017-11-22 Steve MacLean[Arm64] SIMD Normalize struct arg type
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2017-11-22 Steve MacLean[Arm64] SIMD morph varTypeIsStruct
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2017-11-22 Steve MacLean[Arm64] Fix LowerVirtualStubCall reg allocation
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2017-11-20 Steve MacLean[Arm64] SIMD12 genCodeForStoreLcl*
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2017-11-20 Steve MacLean[Arm64] SIMD fix SIMDIntrinsicSet* op2 life
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2017-11-10 Steve MacLean[Arm64] SIMD Normalize struct return type
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2017-11-10 Steve MacLean[Arm64] Do not change vector load register size
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2017-11-10 Steve MacLean[ARM64] SIMD genCodeForStoreLclVar zero init
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2017-11-10 Steve MacLean[ARM64] genSIMDIntrinsicInit contain 0
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2017-11-10 Steve MacLean[ARM64] SIMD Partial Callee Save SIMD12
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2017-11-09 Steve MacLean[Arm64] SIMD genMultiRegCallStoreToLocal
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2017-11-09 Steve MacLean[Arm64] SIMD genStructReturn
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2017-11-08 Steve MacLean[ARM64] SIMD genCodeForLclFld
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2017-11-08 Steve MacLean[Arm64] SIMD genPutArgStk
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2017-11-07 Steve MacLean[Arm64] SIMD miscellaneous varTypeIsStruct
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2017-11-07 Steve MacLean[Arm64] SIMD genFnPrologCalleeRegArgs
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2017-11-07 Steve MacLean[Arm64] SIMD applyCalleeSaveHeuristics
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2017-11-06 Steve MacLean[Arm64] genSIMDIntrinsicNarrow/Widen
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2017-11-06 Steve MacLean[Arm64] SIMD ContainCheckStoreLoc
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2017-11-06 Steve MacLean[ARM64] SIMD ins_Move_Extend
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2017-11-06 Steve MacLean[Arm64] Prefer EA_PTRSIZE for addresses
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2017-11-03 Steve MacLean[Arm64] SIMD12 Indirect Load/Store
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2017-11-03 Steve MacLean[Arm64] emitIns_R_S imm size
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2017-11-03 Steve MacLean[Arm64] emitIns_S_R imm size
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2017-11-03 Steve MacLean[Arm64/Arm] genRangeCheck gtThrowKind
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2017-11-02 Steve MacLean[Arm64] genSIMDIntrinsicRelOp
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2017-11-02 Steve MacLean[Arm64] SIMDIntrinsicGetItem
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2017-11-01 Steve MacLean[Arm64] Fix genSIMDIntrinsicDotProduct
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2017-11-01 Steve MacLeanAdd SIMD get_Item lower bounds test
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2017-11-01 Steve MacLean[Arm64] Fix impSIMDSelect
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2017-11-01 Steve MacLeanSIMD Handle negative indicies in get_Item
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2017-11-01 Steve MacLean[Arm64] Revise insEncodeDatasizeLS
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2017-11-01 Steve MacLean[Arm64] Instruction requires 9 bits now
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2017-10-31 Steve MacLean[Arm64] Add SIMD codegen
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2017-10-30 Steve MacLean[Arm64] Implement simdintrinsiclist.h
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2017-10-20 Steve MacLean[Arm64] Fix bogus assert
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2017-10-20 Steve MacLean[Arm64] SIMD simd.cpp
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2017-10-20 Steve MacLean[Arm64] Basic SIMD lowering
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2017-10-20 Steve MacLean[Arm64] Add SIMD emitters
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2017-10-20 Steve MacLean[Arm64] Add more SIMD instructions
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2017-10-18 Steve MacLean[Arm64] Support flag FEATURE_SIMD
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2017-10-18 Steve MacLean[Arm64] Add instructions needed by SIMD
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2017-10-12 Steve MacLeanFix JIT/HardwareIntrinsics/IsSupported.cs
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2017-10-12 Steve MacLean[ARM64] Fix INS_dup DV_2D encoding
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2017-10-06 Steve MacLeanFix comments per review
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2017-10-05 Steve MacLean[Arm64] Respond to feedback
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2017-10-04 Steve MacLean[Arm64] Implement GT_XADD, GT_XCHG, GT_CMPXCHG ...
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2017-10-04 Steve MacLean[Arm64] Fix emitJumpDistBind typo
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2017-10-04 Steve MacLean[Arm64] Fix IF_LS_3D emitter
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2017-10-03 Steve MacLean[Arm64] Fix smul[lh] disassembly
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2017-10-03 Steve MacLean[Arm64] Add LD/ST exclusive emitters
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2017-10-02 Steve MacLean[Arm64] Fix TODO-Cleanup add unreached
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2017-09-27 Steve MacLean[Arm64] Respond to feedback
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2017-09-27 Steve MacLean[Arm64] Add JCMP comments per review
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2017-09-27 Steve MacLean[Arm64] Fix JCMP lsra binding
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2017-09-26 Steve MacLean[Arm64] Fix GT_JCMP lsra
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2017-09-26 Steve MacLean[Arm64] Add GT_JCMP node
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2017-09-25 Steve MacLean[Arm64] Repsond to feedback
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2017-09-25 Steve MacLeanCleanup gentree per comments
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2017-09-25 Steve MacLean[Arm64] Use GTF_SET_FLAGS/GTF_USE_FLAGS
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2017-09-22 Steve MacLeanRespond to Feedback #14139
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2017-09-22 Steve MacLean[Arm64] Fix typo
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2017-09-22 Steve MacLean[Arm64] Add emitters for cbz, cbnz, tbz, or tbnz
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2017-09-21 Steve MacLeanFix formatting
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2017-09-20 Steve MacLean[Arm64] Remove LegacyBackend defines
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2017-09-20 Steve MacLean[Arm] Remove obsolete assert
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2017-09-15 Steve MacLean[Arm64] LowerCompare enable bool cast removal
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2017-09-15 Steve MacLean[Arm/Arm64] LowerCast remove small int widen cast
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2017-09-15 Steve MacLean[Arm64] Do not mov extend in genCodeForCompare
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2017-09-13 Steve MacLeanFix formatting
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2017-09-13 Steve MacLean[Arm64] Swap compare operand if longer is second
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2017-09-13 Steve MacLean[Arm64] Enable CMP extended register
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2017-09-12 Steve MacLean[Arm64] Enable Lowering GT_ARR_BOUNDS_CHECK
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