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arm64: zynqmp: Enable EMMC boot
2020-10-27 Michal Simekarm64: zynqmp: Enable EMMC boot
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-10-27 Michal Simekarm64: zynqmp: Add missing support for 9cg version
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-10-27 Alexandre GRIVEAUXARM: zynq: Add Z-turn board V5
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-10-27 Michal Simekdoc: board: xilinx: Add documentation for ZynqMP R5
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-10-27 Michal Simekdoc: board: xilinx: Add documentation for ZynqMP
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-10-27 Michal Simekdoc: board: xilinx: Update links to DT binding docs
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-10-27 Michal Simekdoc: board: xilinx: zynq.rst: Update zynq documentation
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-10-27 Michal SimekMAINTAINERS: Record documentation for Xilinx platforms
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-10-27 Ovidiu Panaitmicroblaze: start.S: Use board_init_f_alloc/init in...
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2020-10-27 Ovidiu Panaitmicroblaze: start.S: Factor out exception setup code...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekclk: fixed-rate: Enable DM_FLAG_PRE_RELOC flag
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: zynqmp-r5: Increase amount of MALLOC space
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 T Karthik Reddycmd: pxe: Add relocation to pxe_sub cmds
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: versal: Fix compilation error when !CONFIG_NET
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: r5: Fix MPU setting for R5
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: r5: Disable EFI loader
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekspl: Kconfig: Record proper dependency for SPL_ATF
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: Disable CONFIG_EFI_LOADER_BOUNCE_BUFFER for...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekmmc: zynq: Fix incorrect indentation
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekfpga: zynqmp: Protect zynqmp_loads() for SPL
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekfpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGA
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekfpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macros
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: common: Do not save fdt_blob to bss section
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal SimekARM: zynqmp: Fix SPL_DM_SPI dependencies
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekarm64: versal: Generate position-independent pre-relocation...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: zynqmp: Add support for saving variables
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: zynqmp: Get zynqmp_get_bootmode() out of CONFIG_BOAR...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: zynqmp: Remove one static variable
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: zynqmp: Add missing 43/46/47dr ID codes
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Ibai Erkiagaxilinx: zynqmp: refactor silicon name function
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Ashok Reddy Somaxilinx: versal: Enable AXI ethernet driver
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Ashok Reddy Somanet: xilinx: axi_emac: Typecast flush_cache arguments
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Ashok Reddy Somanet: xilinx: axi_emac: Fix dma descriptors for 64bit...
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2020-09-23 Harini Katakaminclude: dt-bindings: Add MSCC header
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekarm64: zynqmp: Change bl2_plat_get_bl31_params() guarding
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simeknand: Kconfig: Change dependency for NAND_ARASAN
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Saeed Nowshadiarm64: zynqmp: Correct value of shunt resistor for...
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2020-09-23 Saeed Nowshadiarm64: zynqmp: Add device tree node for 2nd mux on...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 T Karthik Reddyxilinx: Enable uartlite driver for Versal/ZynqMP
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 T Karthik Reddyserial: uartlite: Add support to work with any endianness
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Ashok Reddy Somaconfigs: xilinx: Enable configs required for ubifs
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 T Karthik Reddymicroblaze: Add support for little/big endian in/out...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekboard: xilinx: Enable changing default DTB pick up...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: kconfig: Move sourcing of board Kconfig to...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: kconfig: Change Kconfig dependencies for Xilinx...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekenv: kconfig: Add default option for ARCH_ZYNQ
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simeknet: gem: Add support for more PHYs on MDIO bus
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-23 Michal Simekxilinx: drivers: Use '_' instead of '-' in driver name
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-22 Edgar E. Iglesiasarm64: Add support for larger PIE U-Boot
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-22 Edgar E. Iglesiasarm64: Trap PIE builds early if load address is not...
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-09-22 Edgar E. Iglesiasarm64: Mention 4K aligned load addresses in the PIE...
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekclk: versal: Move pm_query_id out of clock driver
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekmmc: sdhci: Use upper/lower_32_bits macros
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Faiz Abbasmmc: sdhci: Enable high speed conditional on the correspondi...
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2020-08-20 Michal Simekxilinx: common: Change bootm_size variable setting
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: common: Check return value from variable setup
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: common: Get rid of initrd_high variable setup
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: common: Get rid of fdt_high variable
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: Change logic around zynq_board_read_rom_ethaddr()
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: versal: Enable i2c misc eeprom driver
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Ibai Erkiagaxilinx: zynqmp: fix incorrect map not align with IPI HW
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Ibai Erkiagaxilinx: zynqmp: remove chip_id function
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Ibai Erkiagaxilinx: zynqmp: get chip ID at EL3
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Ibai Erkiagaxilinx: zynqmp: get chip ID using firmware driver
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Ibai Erkiagaxilinx: zynqmp: merge firmware calls for EL2 and EL3
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Ibai Erkiagaxilinx: zynqmp: synchronize firmware call return payload
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekmmc: zynq: Fix default value for xlnx,mio-bank
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: Fix xlnx,mio_bank property
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simeki2c: eeprom: Use reg property instead of offset and...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: zynqmp: Enable DFU tftp support
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: Align dfu ram with booti command
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Ashok Reddy Somaarm64: zynqmp: Reduce malloc memory for mini QSPI configuration
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: versal: Use lowest memory for U-Boot
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simeklib: fdt: Convert fdtdes_setup_mem..() to livetree API
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simeklib: fdt: Introduce fdtdec_setup_mem_size_base_lowest()
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Ibai Erkiagaversal: fix versal PM ret payload size
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 T Karthik Reddyxilinx: versal: Add new versal loadpdi command
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Igor Lantsmanarm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: Enable preboot feature for ZynqMP and Versal
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: kconfig: Change Kconfig dependencies for Xilinx...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-08-20 Michal Simekxilinx: Setup bootm variables
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-25 Ashok Reddy Somacommon: fdt: Remove additional 4k space for fdt allocation
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-25 Michal Simekxilinx: zynqmp: Enable pmufw config reloading
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-25 Michal Simekarm64: zynqmp: Print multiboot reg in decimal
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Mike Looijmanstopic: zynqmp: Add support for zynqmp-xilinx-xdp platform
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Mike Looijmansboard: zynqmp: Fix for wrong AMS setting by ROM
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Mike Looijmansboard: topic-miami: Set FCLK1 to 150MHz
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Patrick van Geldernet: xilinx: axi_emac: Fix endless loop when no PHYs...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Johannes Krottmayerdoc: board: xilinx: zynq.rst: add description how to...
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 T Karthik Reddyarm64: xilinx: Print fpga error value in hex
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Ashok Reddy Somaspi: zynq_[q]spi: Convert config's to macro's
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Michal Simeknet: gem: Disable PCS autonegotiation in case of fixed...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 T Karthik Reddyarm64: zynqmp: Change spi-max-frequency for qspi mini
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Saeed Nowshadiarm64: zynqmp: Fix si570 clock output names and references
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 T Karthik Reddyarm64: zynqmp: Reduce console buffer size
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Ashok Reddy Somaarm64: versal: Enable config to map TCM and OCM
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 Ashok Reddy Somaarm: zynq: Enable alternative memory test
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 T Karthik Reddyfpga: zynqpl: Add zynq aes load & loadp commands
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2020-06-24 T Karthik Reddyfpga: zynqpl: Flush dcache only for non-bitstream data
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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