2019-06-26 | Paul Walmsley | dt-bindings: clock: sifive: add MIT license as an option... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-26 | Paul Walmsley | dt-bindings: riscv: resolve 'make dt_binding_check... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-26 | Yash Shah | riscv: dts: Re-organize the DT nodes Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-26 | Atish Patra | RISC-V: defconfig: enable MMC & SPI for RISC-V [paul.walmsley@sifive.com: mention the DEVTMPFS_MOUNT... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-17 | Rolf Eike Beer | riscv: remove unused barrier defines [paul.walmsley@sifive.com: stripped spurious mbox header... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-17 | ShihPo Hung | riscv: mm: synchronize MMU after pte change [paul.walmsley@sifive.com: reversed tab->whitespace conversion, Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-17 | Paul Walmsley | riscv: dts: add initial board data for the SiFive HiFive... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-17 | Paul Walmsley | riscv: dts: add initial support for the SiFive FU540... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-17 | Paul Walmsley | dt-bindings: riscv: convert cpu binding to json-schema Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-17 | Paul Walmsley | dt-bindings: riscv: sifive: add YAML documentation... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-17 | Paul Walmsley | arch: riscv: add support for building DTB files from... Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-11 | Nick Hu | riscv: Fix udelay in RV32. [paul.walmsley@sifive.com: fixed minor spelling error] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-11 | Andreas Schwab | riscv: export pm_power_off again Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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2019-06-11 | Kevin Hilman | RISC-V: defconfig: enable clocks, serial console Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> |
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