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Merge tag 'amd-drm-next-5.14-2021-05-21' of https://gitlab.freedesktop.org/agd5f...
2021-05-20 Hugo Hudrm/amd/display: treat memory as a single-channel for...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2021-04-21 Hugo Hudrm/amd/display: treat memory as a single-channel for...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2021-03-02 Hugo Hudrm/amd/display: treat memory as a single-channel for...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2020-11-02 Hugo Hudrm/amd/display: correct eDP T9 delay
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2020-07-01 Hugo Hudrm/amd/display: Revert "enable plane if plane_status...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2020-05-28 Hugo Hudrm/amd/display: enable plane if container of plane_status...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2019-12-18 Hugo Hudrm/amd/display: disable lttpr for Navi
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2019-12-05 Hugo Hudrm/amd/display: Save/restore link setting for disable...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2019-11-19 Hugo Hudrm/amd/display: Update background color in bottommost...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2019-05-31 Hugo Hudrm/amd/display: Don't use ROM for output TF if GAMMA_CS_TFM_1D
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2019-03-28 Hugo Hudrm/amd/display: Handle branch device with DFP count...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Hugo Hu <Hugo.Hu@amd.com>
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2019-03-21 Hugo Hudrm/amd/display: Programming correct VRR_EN bit in...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2019-01-14 Hugo Hudrm/amd/display: Add debug option to force fclk request
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2018-07-13 Hugo Hudrm/amd/display: Initialize data structure for DalMpVisualCo...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2018-07-13 Hugo Hudrm/amd/display: Patch for extend time to panel poweron.
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2018-07-13 Hugo Hudrm/amd/display: Correct calculation of duration time.
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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2017-12-20 Hugo Hudrm/amd/display: Use the maximum link setting which...
Signed-off-by: Hugo Hu <hugo.hu@amd.com>
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