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drm/i915/gvt: Fix mmio handler break on BXT/APL.
2020-10-30 Colin Xudrm/i915/gvt: Fix mmio handler break on BXT/APL.
Signed-off-by: Colin Xu <colin.xu@intel.com>
...msgid/20201016052913.209248-1-colin.xu@intel.com
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2020-10-30 Colin Xudrm/i915/gvt: Only pin/unpin intel_context along with...
Signed-off-by: Colin Xu <colin.xu@intel.com>
...msgid/20201016054059.238371-1-colin.xu@intel.com
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2020-10-19 Colin Xudrm/i915/gvt: Set SNOOP for PAT3 on BXT/APL to workaround...
Signed-off-by: Colin Xu <colin.xu@intel.com>
...msgid/20201012045231.226748-1-colin.xu@intel.com
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2020-10-19 Colin Xudrm/i915/gvt: Allow zero out HWSP addr on hws_pga_write
Signed-off-by: Colin Xu <colin.xu@intel.com>
...msgid/20200911065239.147789-1-colin.xu@intel.com
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2020-09-10 Colin Xudrm/i915/gvt: Init vreg GUC_STATUS to GS_MIA_IN_RESET
Signed-off-by: Colin Xu <colin.xu@intel.com>
...patch/msgid/20200819010900.54598-1-colin.xu@intel.com
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2020-09-10 Colin Xudrm/i915/gvt: Add F_CMD_ACCESS for some GEN9 SKU WA...
Signed-off-by: Colin Xu <colin.xu@intel.com>
...patch/msgid/20200819010801.53411-1-colin.xu@intel.com
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2020-07-29 Colin Xudrm/i915/gvt: Do not reset pv_notified when vGPU transit...
Signed-off-by: Colin Xu <colin.xu@intel.com>
...msgid/20200709071002.247960-3-colin.xu@intel.com
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2020-07-29 Colin Xudrm/i915/gvt: Do not destroy ppgtt_mm during vGPU D3...
Signed-off-by: Colin Xu <colin.xu@intel.com>
...msgid/20200709071002.247960-2-colin.xu@intel.com
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2020-06-17 Colin Xudrm/i915/gvt: Use GFP_ATOMIC instead of GFP_KERNEL...
Signed-off-by: Colin Xu <colin.xu@intel.com>
...patch/msgid/20200601035556.19999-1-colin.xu@intel.com
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2020-06-17 Colin Xudrm/i915/gvt: Fix incorrect check of enabled bits in...
Signed-off-by: Colin Xu <colin.xu@intel.com>
...patch/msgid/20200601030721.17129-1-colin.xu@intel.com
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2020-06-17 Colin Xudrm/i915/gvt: Fix two CFL MMIO handling caused by regression.
Signed-off-by: Colin Xu <colin.xu@intel.com>
...patch/msgid/20200601030638.16002-1-colin.xu@intel.com
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2020-06-17 Colin Xudrm/i915/gvt: Add one missing MMIO handler for D_SKL_PLUS
Signed-off-by: Colin Xu <colin.xu@intel.com>
...patch/msgid/20200601030457.14002-1-colin.xu@intel.com
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2020-05-09 Colin Xudrm/i915/gvt: Init DPLL/DDI vreg for virtual display...
Signed-off-by: Colin Xu <colin.xu@intel.com>
...msgid/20200508060506.216250-1-colin.xu@intel.com
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2019-07-30 Colin Xudrm/i915/gvt: Adding ppgtt to GVT GEM context after...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-05-30 Colin Xudrm/i915/gvt: Fix vGPU CSFE_CHICKEN1_REG mmio handler
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-05-30 Colin Xudrm/i915/gvt: Fix GFX_MODE handling
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-05-30 Colin Xudrm/i915/gvt: Update force-to-nonpriv register whitelist
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-05-05 Colin Xudrm/i915/gvt: Add in context mmio 0x20D8 to gen9 mmio...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-04-16 Colin Xudrm/i915/gvt: Fix incorrect mask of mmio 0x22028 in...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-03-29 Colin Xudrm/i915/gvt: Enable async flip on plane surface mmio...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-03-29 Colin Xudrm/i915/gvt: Enable synchronous flip on handling MI_DISPLAY...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-03-29 Colin Xudrm/i915/gvt: Add macro define for mmio 0x50080 and...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-02-22 Colin Xudrm/i915/gvt: Add in context mmio 0x20D8 to gen9 mmio...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-02-18 Colin Xudrm/i915/gvt: Use consist max display pipe numbers...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2019-01-14 Colin Xudrm/i915/gvt: Allow F_CMD_ACCESS on mmio 0x21f0
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-09-18 Colin Xudrm/i915/gvt: Add GEN9_CLKGATE_DIS_4 to default BXT...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-09-18 Colin Xudrm/i915/gvt: Init PHY related registers for BXT
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-08-30 Colin Xudrm/i915/gvt: Handle GEN9_WM_CHICKEN3 with F_CMD_ACCESS.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-08-30 Colin Xudrm/i915/gvt: Make correct handling to vreg BXT_PHY_CTL_FAMILY
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-07-09 Colin Xudrm/i915/gvt: Handle EDP_PSR_IMR and EDP_PSR_IIR for...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915: Enable KVMGT for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Add mmio handler for for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Enable dma_buf support for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Enable virtual display support for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Enable force wake support for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Enable cmd_parser support for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Enable mmio context init and switch for...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Enable irq initialization for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Enable gtt initialization for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Enable device info initialization for...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Add MEDIA_POOL_STATE for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-06-13 Colin Xudrm/i915/gvt: Add D_BXT device type define for BXT.
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-05-18 Colin Xudrm/i915/gvt: Use sched_lock to protect gvt scheduler...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-05-18 Colin Xudrm/i915/gvt: Use vgpu_lock to protect per vgpu access
Signed-off-by: Colin Xu <colin.xu@intel.com>
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2018-03-19 Colin Xudrm/i915/gvt: Remove reduntant printing of untracked...
Signed-off-by: Colin Xu <colin.xu@intel.com>
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