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Merge tag 'kvmarm-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git...
2022-02-02
Anup Patel
RISC-V: KVM: Fix SBI implementation version
Signed-off-by:
Anup Patel
<apatel@ventanamicro.com>
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2022-01-11
Anup Patel
RISC-V: Use SBI SRST extension when available
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2022-01-06
Anup Patel
MAINTAINERS: Update Anup's email address
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2022-01-06
Anup Patel
KVM: selftests: Add initial support for RISC-V 64-bit
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2022-01-06
Anup Patel
KVM: selftests: Add EXTRA_CFLAGS in top-level Makefile
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2022-01-06
Anup Patel
RISC-V: KVM: Add VM capability to allow userspace get...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2022-01-06
Anup Patel
RISC-V: KVM: Forward SBI experimental and vendor extensions
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-11-22
Anup Patel
RISC-V: KVM: Fix incorrect KVM_MAX_VCPUS value
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-11-19
Anup Patel
RISC-V: Enable KVM in RV64 and RV32 defconfigs as a...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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tree
2021-10-31
Anup Patel
RISC-V: KVM: Fix GPA passed to __kvm_riscv_hfence_gvma_xyz...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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tree
2021-10-31
Anup Patel
RISC-V: KVM: Factor-out FP virtualization into separate...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: KVM: Add MAINTAINERS entry
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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tree
2021-10-04
Anup Patel
RISC-V: KVM: Document RISC-V specific parts of KVM API
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: KVM: Implement MMU notifiers
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
commit
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2021-10-04
Anup Patel
RISC-V: KVM: Implement stage2 page table programming
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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tree
2021-10-04
Anup Patel
RISC-V: KVM: Implement VMID allocator
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: KVM: Handle WFI exits for VCPU
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: KVM: Handle MMIO exits for VCPU
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: KVM: Implement VCPU world-switch
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: KVM: Implement VCPU interrupts and requests...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: KVM: Implement VCPU create, init and destroy...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: Add initial skeletal KVM support
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-10-04
Anup Patel
RISC-V: Add hypervisor extension related CSR defines
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-05-01
Anup Patel
RISC-V: Fix error code returned by riscv_hartid_to_cpuid()
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-03-30
Anup Patel
RISC-V: Don't print SBI version for all detected extensions
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-02-27
Anup Patel
RISC-V: Enable CPU Hotplug in defconfigs
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2021-02-19
Anup Patel
RISC-V: Implement ASID allocator
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-11-25
Anup Patel
RISC-V: Add missing jump label initialization
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-11-06
Anup Patel
RISC-V: Use non-PGD mappings for early DTB access
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-10-02
Anup Patel
RISC-V: Move DT mapping outof fixmap
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-09-30
Anup Patel
RISC-V: Check clint_time_val before use
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-08-20
Anup Patel
dt-bindings: timer: Add CLINT bindings
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-08-20
Anup Patel
RISC-V: Remove CLINT related code from timer and arch
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-08-20
Anup Patel
clocksource/drivers: Add CLINT timer driver
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-08-20
Anup Patel
RISC-V: Add mechanism to provide custom IPI operations
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-06-10
Anup Patel
RISC-V: Don't mark init section as non-executable
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-06-10
Anup Patel
RISC-V: Force select RISCV_INTC for CONFIG_RISCV
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-06-10
Anup Patel
RISC-V: Remove do_IRQ() function
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-06-10
Anup Patel
clocksource/drivers/timer-riscv: Use per-CPU timer...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-06-10
Anup Patel
irqchip: RISC-V per-HART local interrupt controller...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-06-10
Anup Patel
RISC-V: Rename and move plic_find_hart_id() to arch...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-06-10
Anup Patel
RISC-V: self-contained IPI handling routine
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-05-25
Anup Patel
irqchip/sifive-plic: Improve boot prints for multiple...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-05-25
Anup Patel
irqchip/sifive-plic: Setup cpuhp once after boot CPU...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-05-25
Anup Patel
irqchip/sifive-plic: Set default irq affinity in plic_irqdom...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-05-04
Anup Patel
RISC-V: Remove N-extension related defines
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-05-04
Anup Patel
RISC-V: Add bitmap reprensenting ISA features common...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-05-04
Anup Patel
RISC-V: Export riscv_cpuid_to_hartid_mask() API
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-03-26
Anup Patel
RISC-V: Only select essential drivers for SOC_VIRT...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-03-05
Anup Patel
RISC-V: Select Goldfish RTC driver for QEMU virt machine
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-03-05
Anup Patel
RISC-V: Select SYSCON Reboot and Poweroff for QEMU...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-03-05
Anup Patel
RISC-V: Enable QEMU virt machine support in defconfigs
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-03-05
Anup Patel
RISC-V: Add kconfig option for QEMU virt machine
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2020-02-18
Anup Patel
RISC-V: Don't enable all interrupts in trap_init()
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-10-10
Anup Patel
platform: goldfish: Allow goldfish drivers for archs...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-09-20
Anup Patel
KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-09-19
Anup Patel
RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-08-28
Anup Patel
RISC-V: Fix FIXMAP area corruption on RV32 systems
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-07-09
Anup Patel
RISC-V: Setup initial page tables in two stages
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-07-01
Anup Patel
RISC-V: Fix memory reservation in setup_bootmem()
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-07-01
Anup Patel
RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-05-17
Anup Patel
tty: Don't force RISCV SBI console as preferred console
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-05-17
Anup Patel
RISC-V: Access CSRs using CSR numbers
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-05-17
Anup Patel
RISC-V: Add interrupt related SCAUSE defines in asm...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-05-17
Anup Patel
RISC-V: Use tabs to align macro values in asm/csr.h
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-04-10
Anup Patel
RISC-V: Fix Maximum Physical Memory 2GiB option for...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-04-09
Anup Patel
RISC-V: Add separate defconfig for 32bit systems
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-03-29
Anup Patel
RISC-V: Fix FIXMAP_TOP to avoid overlap with VMALLOC...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-03-27
Anup Patel
RISC-V: Always compile mm/init.c with cmodel=medany...
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-02-21
Anup Patel
irqchip/sifive-plic: Implement irq_set_affinity() for...
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2019-02-21
Anup Patel
irqchip/sifive-plic: Differentiate between PLIC handler...
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2019-02-21
Anup Patel
irqchip/sifive-plic: Add warning in plic_init() if...
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2019-02-21
Anup Patel
irqchip/sifive-plic: Pre-compute context hart base...
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2019-02-21
Anup Patel
RISC-V: Free-up initrd in free_initrd_mem()
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
commit
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2019-02-21
Anup Patel
RISC-V: Implement compile-time fixed mappings
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-02-21
Anup Patel
RISC-V: Move setup_vm() to mm/init.c
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-02-21
Anup Patel
RISC-V: Move setup_bootmem() to mm/init.c
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-02-21
Anup Patel
RISC-V: Setup init_mm before parse_early_param()
Signed-off-by:
Anup Patel
<anup.patel@wdc.com>
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2019-01-09
Anup Patel
tty/serial: Add RISC-V SBI earlycon support
Signed-off-by:
Anup Patel
<anup@brainfault.org>
commit
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2019-01-07
Anup Patel
RISC-V: Make BSS section as the last section in vmlinux...
Signed-off-by:
Anup Patel
<anup@brainfault.org>
commit
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2018-12-21
Anup Patel
RISC-V: Select GENERIC_SCHED_CLOCK for clocksource...
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-12-18
Anup Patel
clocksource/drivers/riscv_timer: Provide the sched_clock
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-12-17
Anup Patel
RISC-V: Remove EARLY_PRINTK support
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-12-17
Anup Patel
RISC-V: defconfig: Enable RISC-V SBI earlycon support
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-11-20
Anup Patel
RISC-V: Build flat and compressed kernel images
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-11-13
Anup Patel
RISC-V: defconfig: Enable printk timestamps
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-11-02
Anup Patel
RISC-V: refresh defconfig
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-10-23
Anup Patel
RISC-V: Show IPI stats
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-10-23
Anup Patel
RISC-V: Show CPU ID and Hart ID separately in /proc...
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-10-23
Anup Patel
RISC-V: No need to pass scause as arg to do_IRQ()
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2018-04-25
Anup Patel
rpmsg: Add driver_override device attribute for rpmsg_device
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2017-11-07
Anup Patel
ARM: multi_v7_defconfig: Select RPMSG_VIRTIO as module
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2017-10-27
Anup Patel
mailbox: Build Broadcom FlexRM driver as loadable module...
Signed-off-by:
Anup Patel
<anup.patel@broadcom.com>
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2017-10-27
Anup Patel
mailbox: bcm-flexrm-mailbox: Use common GPL comment...
Signed-off-by:
Anup Patel
<anup.patel@broadcom.com>
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2017-10-27
Anup Patel
mailbox: bcm-flexrm-mailbox: Print ring number in errors...
Signed-off-by:
Anup Patel
<anup.patel@broadcom.com>
commit
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2017-10-27
Anup Patel
mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush...
Signed-off-by:
Anup Patel
<anup.patel@broadcom.com>
commit
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2017-10-26
Anup Patel
rpmsg: Allow RPMSG_VIRTIO to be enabled via menuconfig...
Signed-off-by:
Anup Patel
<anup@brainfault.org>
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2017-10-23
Anup Patel
dmaengine: Build bcm-sba-raid driver as loadable module...
Signed-off-by:
Anup Patel
<anup.patel@broadcom.com>
commit
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2017-10-23
Anup Patel
dmaengine: bcm-sba-raid: Use common GPL comment header
Signed-off-by:
Anup Patel
<anup.patel@broadcom.com>
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