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| 2014-11-11 | Soren Brinkmann | zynq: Use GPLed files for SPL Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | zynq: Implement dump clock command Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | serial_zynq: Migrate to Zynq clock framework Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | net: zynq_gem: Calculate clock dividers dynamically Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | net: zynq_gem: Move RCLK details out of driver Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | zynq: timer: Migrate to zynq clock framework Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | zynq: Provide a framework to read clock frequencies Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | common: Provide DIV_ROUND_CLOSEST macro Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2013-12-10 | Soren Brinkmann | serial: zynq: Remove unused #defines Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2013-12-02 | Soren Brinkmann | serial: zynq: Remove unused #defines Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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| 2013-08-12 | Soren Brinkmann | fpga: zynqpl: Clear loopback mode during device init Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
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