2023-09-01 |
Lad Prabhakar | dt-bindings: cache: andestech,ax45mp-cache: Add DT... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-09-01 |
Lad Prabhakar | riscv: mm: dma-noncoherent: nonstandard cache operations... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-09-01 |
Lad Prabhakar | riscv: errata: Add Andes alternative ports Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-09-01 |
Lad Prabhakar | riscv: asm: vendorid_list: Add Andes Technology to... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-09-01 |
Lad Prabhakar | riscv: dma-mapping: switch over to generic implementation Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-09-01 |
Arnd Bergmann | riscv: dma-mapping: skip invalidation before bidirectional DMA Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-09-01 |
Arnd Bergmann | riscv: dma-mapping: only invalidate after DMA, not... Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-06 |
Palmer Dabbelt | Merge patch series "riscv: some CMO alternative related... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-06 |
Jisheng Zhang | riscv: mm: mark noncoherent_supported as __ro_after_init Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-06 |
Jisheng Zhang | riscv: mm: mark CBO relate initialization funcs as... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-06 |
Jisheng Zhang | riscv: errata: thead: only set cbom size & noncoherent... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-06 |
Samuel Holland | riscv: Select HAVE_ARCH_USERFAULTFD_MINOR Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-06 |
Palmer Dabbelt | RISC-V: Document the ISA string parsing rules for ACPI Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-05 |
Marc Zyngier | risc-v: Fix order of IPI enablement vs RCU startup Cc: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-05 |
John Hubbard | mm: riscv: fix an unsafe pte read in huge_pte_alloc() Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-05 |
Conor Dooley | dt-bindings: riscv: deprecate riscv,isa CC: Palmer Dabbelt <palmer@dabbelt.com> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-04 |
Conor Dooley | RISC-V: drop error print from riscv_hartid_to_cpuid() Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-04 |
Björn Töpel | riscv: Discard vector state on syscalls Suggested-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-04 |
Woody Zhang | riscv: move memblock_allow_resize() after linear mapping... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-04 |
Song Shuai | riscv: Enable ARCH_SUSPEND_POSSIBLE for s2idle Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-04 |
Ben Dooks | riscv: vdso: include vdso/vsyscall.h for vdso_data Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-01 |
Andy Chiu | selftests: Test RISC-V Vector's first-use handler Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-01 |
Andy Chiu | riscv: vector: clear V-reg in the first-use trap Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-01 |
Andy Chiu | riscv: vector: only enable interrupts in the first... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-01 |
Palmer Dabbelt | Merge patch series "riscv: enable HAVE_LD_DEAD_CODE_DATA_ELI... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-01 |
Palmer Dabbelt | RISC-V: Fix up some vector state related build failures Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-07-01 |
Palmer Dabbelt | RISC-V: Document that V registers are clobbered on... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-25 |
Nick Desaulniers | riscv: disable HAVE_LD_DEAD_CODE_DATA_ELIMINATION for LLD Reported-by: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-25 |
Zhangjin Wu | riscv: enable HAVE_LD_DEAD_CODE_DATA_ELIMINATION Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-25 |
Jisheng Zhang | vmlinux.lds.h: use correct .init.data.* section name Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-25 |
Jisheng Zhang | riscv: vmlinux-xip.lds.S: remove .alternative section Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-25 |
Jisheng Zhang | riscv: move options to keep entries sorted Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-23 |
Palmer Dabbelt | Merge patch series "dt-bindings: riscv: cpus: switch... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-23 |
Song Shuai | riscv: hibernate: remove WARN_ON in save_processor_state Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-23 |
Palmer Dabbelt | Merge patch series "riscv: Add independent irq/softirq... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-23 |
Palmer Dabbelt | Merge patch series "ISA string parser cleanups" Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-22 |
Conor Dooley | dt-bindings: riscv: cpus: switch to unevaluatedProperties... Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-22 |
Conor Dooley | dt-bindings: riscv: cpus: add a ref the common cpu... Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-22 |
Guo Ren | riscv: stack: Add config of thread stack size Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-22 |
Guo Ren | riscv: stack: Support HAVE_SOFTIRQ_ON_OWN_STACK Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-22 |
Guo Ren | riscv: stack: Support HAVE_IRQ_EXIT_ON_IRQ_STACK Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-21 |
Conor Dooley | RISC-V: always report presence of extensions formerly... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-21 |
Conor Dooley | dt-bindings: riscv: explicitly mention assumption of... Suggested-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-21 |
Conor Dooley | RISC-V: remove decrement/increment dance in ISA string... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-21 |
Conor Dooley | RISC-V: rework comments in ISA string parser Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-21 |
Conor Dooley | RISC-V: validate riscv,isa at boot, not during ISA... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-21 |
Conor Dooley | RISC-V: split early & late of_node to hartid mapping Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-21 |
Conor Dooley | RISC-V: simplify register width check in ISA string... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-20 |
Viacheslav Mitrofanov | perf: RISC-V: Limit the number of counters returned... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-20 |
Fangrui Song | riscv: replace deprecated scall with ecall Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-20 |
Tiezhu Yang | riscv: uprobes: Restore thread.bad_cause Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-20 |
Jisheng Zhang | riscv: mm: try VMA lock-based page fault handling first Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-20 |
Björn Töpel | riscv: mm: Pre-allocate PGD entries for vmalloc/modules... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Palmer Dabbelt | Merge patch series "RISC-V: Export Zba, Zbb to usermode... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Evan Green | RISC-V: hwprobe: Expose Zba, Zbb, and Zbs Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Evan Green | RISC-V: Track ISA extensions per hart Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Evan Green | RISC-V: Add Zba, Zbs extension probing Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Krzysztof Kozlowski | dt-bindings: riscv: cpus: drop unneeded quotes Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Sunil V L | RISC-V/perf: Use standard interface to get INTC domain Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Sunil V L | RISC-V: ACPI : Fix for usage of pointers in different... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Song Shuai | riscv: hibernation: Remove duplicate call of suspend_restore... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-19 |
Song Shuai | riscv: hibernation: Replace jalr with jr before suspend_rest... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-14 |
Conor Dooley | Documentation: RISC-V: patch-acceptance: mention patchwork... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-14 |
Jisheng Zhang | riscv: mm: stub extable related functions/macros for... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-14 |
Ben Dooks | riscv: say disabling zicbom if no or bad riscv,cbom... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Ruan Jinjie | riscv: fix kprobe __user string arg print fault issue Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Palmer Dabbelt | Merge patch series "riscv: Add vector ISA support" Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | selftests: add .gitignore file for RISC-V hwprobe Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | selftests: Test RISC-V Vector prctl interface Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: Add documentation for Vector Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Guo Ren | riscv: Enable Vector code to be built Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: detect assembler support for .option arch Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: Add sysctl to set the default vector rule for... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: Add prctl controls for userspace vector management Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: hwcap: change ELF_HWCAP to a function Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Vincent Chen | riscv: KVM: Add vector lazy save/restore support Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Vincent Chen | riscv: kvm: Add V extension to KVM ISA Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: prevent stack corruption by reserving task_pt_regs... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: signal: validate altstack to reflect Vector Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Vincent Chen | riscv: signal: Report signal frame size to userspace... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: signal: Add sigcontext save/restore for vector Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: signal: check fp-reserved words unconditionally Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: Add ptrace vector support Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: Allocate user's vector context in the first... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: Add task switch support for vector Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: Introduce struct/helpers to save/restore per... Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: Introduce riscv_v_vsize to record size of Vector... Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: Introduce Vector enable/disable helpers Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Guo Ren | riscv: Disable Vector Instructions for kernel itself Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: Clear vector regfile on bootup Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Greentime Hu | riscv: Add new csr defines related to vector extension Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Andy Chiu | riscv: hwprobe: Add support for probing V in RISCV_HWPROBE_K... Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Guo Ren | riscv: Extending cpufeature.c to detect V-extension Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-08 |
Guo Ren | riscv: Rename __switch_to_aux() -> fpu Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-07 |
Alexandre Ghiti | riscv: Check the virtual alignment before choosing... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-07 |
Alexandre Ghiti | riscv: Fix kfence now that the linear mapping can be... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-07 |
Hsieh-Tseng Shen | riscv: mm: Ensure prot of VM_WRITE and VM_EXEC must... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-06 |
Palmer Dabbelt | Merge patch series "riscv: allow case-insensitive ISA... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-06 |
Conor Dooley | dt-bindings: riscv: drop invalid comment about riscv... Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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2023-06-06 |
Yangyu Chen | riscv: allow case-insensitive ISA string parsing Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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