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ixgbe: stop resetting SYSTIME in ixgbe_ptp_start_cyclecounter
2022-08-22 Aya Levinnet/mlx5e: Fix wrong application of the LRO state
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-07-19 Aya Levinnet/mlx5e: Add resiliency for PTP TX port timestamp
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-07-19 Aya Levinnet/mlx5: Expose ts_cqe_metadata_size2wqe_counter
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-06-01 Aya Levinnet: ping6: Fix ping -6 with interface name
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-05-18 Aya Levinnet/mlx5e: Allow relaxed ordering over VFs
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-05-18 Aya Levinnet/mlx5e: Block rx-gro-hw feature in switchdev mode
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-05-04 Aya Levinnet/mlx5: Fix slab-out-of-bounds while reading resource...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-02-17 Aya Levinnet/mlx5e: E-Switch, Add support for tx_port_ts in...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-02-17 Aya Levinnet/mlx5e: E-Switch, Add PTP counters for uplink representor
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-02-15 Aya Levinnet/mlx5e: Use FW limitation for max MPW WQEBBs
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-02-15 Aya Levinnet/mlx5e: Read max WQEBBs on the SQ from firmware
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-01-07 Aya LevinRevert "net/mlx5e: Block offload of outer header csum...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-01-07 Aya LevinRevert "net/mlx5e: Block offload of outer header csum...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-01-07 Aya Levinnet/mlx5e: Fix page DMA map/unmap attributes
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2022-01-07 Aya Levinnet/mlx5e: Fix feature check per profile
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-12-01 Aya Levinnet/mlx5: Fix access to a non-supported register
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-11-17 Aya Levinnet/mlx5: Avoid printing health buffer when firmware...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-10-25 Aya Levinnet/mlx5: Add periodic update of host time to firmware
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-10-25 Aya Levinnet/mlx5: Print health buffer by log level
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-10-25 Aya Levinnet/mlx5: Extend health buffer dump
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-10-12 Aya Levinnet/mlx5e: Mutually exclude RX-FCS and RX-port-timestamp
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-30 Aya Levinnet/mlx5: Tolerate failures in debug features while...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-30 Aya Levinnet/mlx5e: Mutually exclude setting of TX-port-TS and...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-30 Aya Levinnet/mlx5: Avoid generating event after PPS out in Real...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-30 Aya Levinnet/mlx5: Force round second at 1PPS out start time
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-24 Aya Levinnet/mlx5e: Add error flow for ethtool -X command
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-23 Aya Levinnet/mlx4_en: Don't allow aRFS for encapsulated packets
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-13 Aya Levinudp_tunnel: Fix udp_tunnel_nic work-queue type
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-07 Aya Levinnet/mlx5e: Fix condition when retrieving PTP-rqn
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-09-07 Aya Levinnet/mlx5e: Fix mutual exclusion between CQE compression...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-08-10 Aya Levinnet/mlx5: Fix return value from tracer initialization
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-08-10 Aya Levinnet/mlx5: Block switchdev mode while devlink traps...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-07-27 Aya Levinnet/mlx5: Unload device upon firmware fatal error
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-07-27 Aya Levinnet/mlx5e: Fix page allocation failure for ptp-RQ over SF
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-07-27 Aya Levinnet/mlx5e: Fix page allocation failure for trap-RQ...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-07-27 Aya Levinnet/mlx5e: Consider PTP-RQ when setting RX VLAN stripping
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-06-16 Aya Levinnet/mlx5: Reset mkey index on creation
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-06-10 Aya Levinnet/mlx5e: Block offload of outer header csum for GRE...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-06-10 Aya Levinnet/mlx5e: Block offload of outer header csum for UDP...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-06-10 Aya Levinnet/mlx5e: Fix select queue to consider SKBTX_HW_TSTAMP
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-06-10 Aya Levinnet/mlx5e: Don't update netdev RQs with PTP-RQ
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-06-02 Aya Levinnet/mlx5e: Fix conflict with HW TS and CQE compression
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-06-02 Aya Levinnet/mlx5e: Fix HW TS with CQE compression according...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-06-02 Aya Levinnet/mlx5e: Fix incompatible casting
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-05-19 Aya Levinnet/mlx5e: Fix error path of updating netdev queues
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-04-16 Aya Levinnet/mlx5: Enhance diagnostics info for TX/RX reporters
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-04-16 Aya Levinnet/mlx5: Add helper to initialize 1PPS
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-04-14 Aya Levinnet/mlx5e: Fix setting of RS FEC mode
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-04-14 Aya Levinnet/mlx5: Fix setting of devlink traps in switchdev...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-04-14 Aya Levinnet/mlx5e: Fix RQ creation flow for queues which doesn...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-04-07 Aya Levinnet/mlx5: Fix PBMC register mapping
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-04-07 Aya Levinnet/mlx5: Fix PPLM register mapping
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-31 Aya Levinnet/mlx5e: Fix ethtool indication of connector type
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Update ethtool setting of CQE compression
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Allow coexistence of CQE compression and...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Add PTP Flow Steering support
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Introduce Flow Steering ANY API
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Introduce Flow Steering UDP API
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Cleanup Flow Steering level
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Add PTP RQ to RX reporter
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Refactor RX reporter diagnostics
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet:mlx5e: Add PTP-TIR and PTP-RQT
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Add PTP-RX statistics
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Add RQ to PTP channel
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-30 Aya Levinnet/mlx5e: Add states to PTP channel
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-26 Aya Levinnet/mlx5e: Cleanup PTP
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-26 Aya Levinnet/mlx5e: Generalize PTP implementation
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-26 Aya Levinnet/mlx5e: Generalize direct-TIRs and direct-RQTs API
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-26 Aya Levinnet/mlx5e: Generalize close RQ
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-26 Aya Levinnet/mlx5e: Generalize RQ activation
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-26 Aya Levinnet/mlx5e: Generalize open RQ
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-26 Aya Levinnet/mlx5: Add helper to set time-stamp translator on...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-26 Aya Levinnet/mlx5e: Allow creating mpwqe info without channel
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-22 Aya Levinnet/mlx5e: Fix error path for ethtool set-priv-flag
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-10 Aya Levinnet/mlx5: Fix turn-off PPS command
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-10 Aya Levinnet/mlx5e: Set PTP channel pointer explicitly to NULL
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-03-10 Aya Levinnet/mlx5e: Accumulate port PTP TX stats with other...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-02-16 Aya Levinnet/mlx5: Add cyc2time HW translation mode support
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-02-11 Aya Levindevlink: Fix dmac_filter trap name, align to its documentation
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5e: Enable traps according to link state
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5e: Add listener to DMAC filter trap event
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5e: Add listener to trap event
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5e: Add trap entity to ETH driver
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5e: Expose RX dma info helpers
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5e: Add flow steering DMAC trap rule
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5e: Add flow steering VLAN trap rule
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5e: Optimize promiscuous mode
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5: Notify on trap action by blocking event
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5: Rename events notifier header
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5: Register to devlink DMAC filter trap
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5: Register to devlink ingress VLAN filter trap
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levinnet/mlx5: Add support for devlink traps in mlx5 core...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-28 Aya Levindevlink: Add DMAC filter generic packet trap
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-09 Aya Levinnet: ipv6: Validate GSO SKB before finish IPv6 processing
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-07 Aya Levinnet/mlx5e: ethtool, Fix restriction of autoneg with 56G
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2021-01-07 Aya Levinnet/mlx5e: Add missing capability check for uplink...
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2020-12-08 Aya Levinnet/mlx5e: Split between RX/TX tunnel FW support indication
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2020-12-08 Aya Levinnet/mlx5e: Allow RQ outside of channel context
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2020-12-08 Aya Levinnet/mlx5e: Allow CQ outside of channel context
Signed-off-by: Aya Levin <ayal@nvidia.com>
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2020-11-27 Aya Levinnet/mlx5: Expose IP-in-IP TX and RX capability bits
Signed-off-by: Aya Levin <ayal@nvidia.com>
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