2021-12-07 | Tudor Ambarus | mtd: spi-nor: issi: is25lp256: Init flash based on... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211207140254.87681-15-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: gigadevice: gd25q256: Init flash based... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211207140254.87681-14-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: spansion: s25fl256s0: Skip SFDP parsing Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211207140254.87681-13-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: winbond: w25q256jvm: Init flash based... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211207140254.87681-12-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: core: Move spi_nor_set_addr_width() in... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211207140254.87681-11-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: core: Init all flash parameters based... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211207140254.87681-10-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: Introduce spi_nor_init_fixup_flags() Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20211207140254.87681-9-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: Introduce spi_nor_init_flags() Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20211207140254.87681-8-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: Rework the flash_info flags Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20211207140254.87681-7-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: core: Introduce flash_info mfr_flags Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20211207140254.87681-6-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups(... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20211207140254.87681-5-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: Introduce spi_nor_set_mtd_info() Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20211207140254.87681-4-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: core: Don't use mtd_info in the NOR's... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20211207140254.87681-3-tudor.ambarus@microchip.com |
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2021-12-07 | Tudor Ambarus | mtd: spi-nor: Fix mtd size for s3an flashes Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20211207140254.87681-2-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: spansion: Use manufacturer late_init() Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-12-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: sst: Use manufacturer late_init() to... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-11-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: xilinx: Use manufacturer late_init()... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-10-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: winbond: Use manufacturer late_init(... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-9-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: sst: Use flash late_init() for locking Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-8-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: atmel: Use flash late_init() for locking Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-7-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: core: Introduce the late_init() hook Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-6-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: Get rid of nor->page_size Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-5-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: core: Use container_of to get the pointer... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-3-tudor.ambarus@microchip.com |
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2021-11-17 | Tudor Ambarus | mtd: spi-nor: core: Fix spi_nor_flash_parameter otp... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20211029172633.886453-2-tudor.ambarus@microchip.com |
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2021-07-30 | Tudor Ambarus | crypto: atmel-aes - Allocate aes dev at tfm init time Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-30 | Tudor Ambarus | crypto: atmel-aes - Add fallback to XTS software implementation Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-30 | Tudor Ambarus | crypto: atmel - Set OFB's blocksize to 1 Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-30 | Tudor Ambarus | crypto: atmel-tdes - Add FIPS81's zero length cryptlen... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-30 | Tudor Ambarus | crypto: atmel-aes - Add NIST 800-38A's zero length... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-30 | Tudor Ambarus | crypto: atmel-aes - Add XTS input length constraint Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-30 | Tudor Ambarus | crypto: atmel-aes - Add blocksize constraint for ECB... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-30 | Tudor Ambarus | crypto: atmel-tdes - Handle error messages Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-30 | Tudor Ambarus | crypto: atmel-tdes - Clarify how tdes dev gets allocated... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-07-19 | Tudor Ambarus | ARM: dts: at91: sama5d4_xplained: Remove spi0 node Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210716154739.835738-1-tudor.ambarus@microchip.com |
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2021-06-15 | Tudor Ambarus | wilc1000: Fix clock name binding Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210428025445.81953-1-tudor.ambarus@microchip.com |
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2021-05-27 | Tudor Ambarus | mtd: spi-nor: macronix: Fix name for mx66l51235f Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2021-05-11 | Tudor Ambarus | clk: Skip clk provider registration when np is NULL Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210426065618.588144-1-tudor.ambarus@microchip.com |
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2021-04-16 | Tudor Ambarus | mtd: core: Constify buf in mtd_write_user_prot_reg() Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...mtd/20210403060931.7119-1-tudor.ambarus@microchip.com |
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2021-04-13 | Tudor Ambarus | pinctrl: at91-pio4: Fix slew rate disablement Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210409082522.625168-1-tudor.ambarus@microchip.com |
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2021-04-11 | Tudor Ambarus | Revert "mtd: spi-nor: macronix: Add support for mx25l51245g" Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210402082031.19055-2-tudor.ambarus@microchip.com |
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2021-03-31 | Tudor Ambarus | mtd: spi-nor: swp: Improve code around spi_nor_check_lock_st... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210322075131.45093-3-tudor.ambarus@microchip.com |
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2021-03-31 | Tudor Ambarus | mtd: spi-nor: Move Software Write Protection logic... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210322075131.45093-2-tudor.ambarus@microchip.com |
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2021-03-23 | Tudor Ambarus | clk: Mark fwnodes when their clock provider is added Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210210114435.122242-2-tudor.ambarus@microchip.com |
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2021-03-15 | Tudor Ambarus | mtd: spi-nor: core: Update comment about the default... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210315055634.17332-1-tudor.ambarus@microchip.com |
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2021-03-15 | Tudor Ambarus | mtd: spi-nor: Get rid of duplicated argument in spi_nor_pars... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210306095002.22983-4-tudor.ambarus@microchip.com |
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2021-03-15 | Tudor Ambarus | mtd: spi-nor: core: Add vdbg msg for spi_nor_erase_multi_sec... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210306095002.22983-3-tudor.ambarus@microchip.com |
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2021-03-15 | Tudor Ambarus | mtd: spi-nor: core: Advance erase after the erase cmd... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210306095002.22983-2-tudor.ambarus@microchip.com |
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2021-03-10 | Tudor Ambarus | spi: atmel: Drop unused variable Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210218132840.131898-1-tudor.ambarus@microchip.com |
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2021-03-10 | Tudor Ambarus | spi: spi-ti-qspi: Free DMA resources Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210218130950.90155-1-tudor.ambarus@microchip.com |
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2021-03-08 | Tudor Ambarus | MAINTAINERS: Add Michael and Pratyush as designated... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210308092333.80521-2-tudor.ambarus@microchip.com |
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2021-02-22 | Tudor Ambarus | spi: spi-ti-qspi: Free DMA resources Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20210218130950.90155-1-tudor.ambarus@microchip.com |
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2021-02-11 | Tudor Ambarus | spi: atmel-quadspi: Disable the QSPI IP at suspend() Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210210135428.204134-1-tudor.ambarus@microchip.com |
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2021-02-10 | Tudor Ambarus | clk: at91: Fix the declaration of the clocks Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210203154332.470587-1-tudor.ambarus@microchip.com |
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2021-02-05 | Tudor Ambarus | mtd: spi-nor: sst: Add support for Global Unlock on... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210121110546.382633-2-tudor.ambarus@microchip.com |
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2021-02-05 | Tudor Ambarus | mtd: spi-nor: Add Global Block Unlock command Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20210121110546.382633-1-tudor.ambarus@microchip.com |
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2020-12-30 | Tudor Ambarus | spi: Fix the clamping of spi->max_speed_hz Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20201216092321.413262-1-tudor.ambarus@microchip.com |
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2020-12-11 | Tudor Ambarus | spi: Limit the spi device max speed to controller's... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...org/r/20201209173514.93328-1-tudor.ambarus@microchip.com |
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2020-12-07 | Tudor Ambarus | spi: atmel-quadspi: Move common code outside of if... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20201207135959.154124-5-tudor.ambarus@microchip.com |
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2020-12-07 | Tudor Ambarus | spi: atmel-quadspi: Write QSPI_IAR only when needed Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20201207135959.154124-4-tudor.ambarus@microchip.com |
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2020-12-07 | Tudor Ambarus | spi: atmel-quadspi: Drop superfluous set of QSPI_IFR_APBTFRT... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20201207135959.154124-3-tudor.ambarus@microchip.com |
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2020-12-07 | Tudor Ambarus | spi: atmel-quadspi: Fix AHB memory accesses Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20201207135959.154124-2-tudor.ambarus@microchip.com |
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2020-11-09 | Tudor Ambarus | mtd: spi-nor: Parse SFDP SCCR Map Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-11-09 | Tudor Ambarus | mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-10-30 | Tudor Ambarus | spi: atmel: Downgrade to dev_dbg when dma_request_chan... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20201030121116.869105-1-tudor.ambarus@microchip.com |
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2020-09-30 | Tudor Ambarus | mtd: rawnand: Don't overwrite the error code from nand_set_e... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...mtd/20200917075213.532161-4-tudor.ambarus@microchip.com |
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2020-09-30 | Tudor Ambarus | mtd: rawnand: Introduce nand_set_ecc_on_host_ops() Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...mtd/20200917075213.532161-3-tudor.ambarus@microchip.com |
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2020-07-16 | Tudor Ambarus | spi: Fix SPI NOR and SPI NAND acronyms Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200716051144.568606-1-tudor.ambarus@microchip.com |
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2020-07-16 | Tudor Ambarus | spi: atmel-quadspi: Use optimezed memcpy_fromio()/memcpy_toio() Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200716043139.565734-1-tudor.ambarus@microchip.com |
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2020-07-15 | Tudor Ambarus | Merge tag 'spi-mem-dtr' into spi-nor/next |
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2020-06-26 | Tudor Ambarus | Merge tag 'cadence-mtd-spi-move' into spi-nor/next |
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2020-05-28 | Tudor Ambarus | mtd: spi-nor: Fix SPI NOR acronym Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-05-28 | Tudor Ambarus | mtd: spi-nor: spansion: Differentiate between s25fl256s... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-05-18 | Tudor Ambarus | ARM: dts: at91: sama5d2_xplained: Add aliases for the... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200518114802.253660-1-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2_xplained: Describe the flx0... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-16-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2_ptc_ek: Add comments to describe... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-17-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2_xplained: Add alias for DBGU Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-15-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Add missing flexcom definitions Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-13-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Remove i2s and tcb aliases... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-14-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Add DMA bindings for the SPI... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-12-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Add DMA bindings for the flx1... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-11-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Add DMA bindings for the flx3... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-10-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Add DMA bindings for the SPI... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-9-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Specify the FIFO size for... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-8-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Move flx0 definitions in the... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-7-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Move flx1 definitions in the... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-6-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Move flx2 definitions in the... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-5-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Move flx3 definitions in the... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-4-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Move flx4 definitions in the... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-3-tudor.ambarus@microchip.com |
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2020-05-15 | Tudor Ambarus | ARM: dts: at91: sama5d2: Fix the label numbering for... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200514050301.147442-2-tudor.ambarus@microchip.com |
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2020-04-29 | Tudor Ambarus | mtd: spi-nor: Fix description of the sr_ready() return... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-04-29 | Tudor Ambarus | mtd: spi-nor: Uniformize the return value in spi_nor_... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-04-14 | Tudor Ambarus | ARM: dts: at91: sama5d27_wlsom1: Add alias for i2c0 Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200413140922.154886-1-tudor.ambarus@microchip.com |
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2020-04-13 | Tudor Ambarus | ARM: dts: at91: sam9x60ek: Add sdmmc1 node Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200403061222.1277147-4-tudor.ambarus@microchip.com |
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2020-04-13 | Tudor Ambarus | ARM: dts: at91: sam9x60ek: Use quad mode in the spi... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200403061222.1277147-1-tudor.ambarus@microchip.com |
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2020-03-25 | Tudor Ambarus | MAINTAINERS: Add the IRC channel to the MTD related... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-03-24 | Tudor Ambarus | mtd: spi-nor: Set all BP bits to one when lock_len... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-03-23 | Tudor Ambarus | mtd: spi-nor: Clear WEL bit when erase or program errors... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-03-20 | Tudor Ambarus | spi: atmel-quadspi: Add verbose debug facilities to... Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> ...r/20200320065058.891221-1-tudor.ambarus@microchip.com |
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2020-03-17 | Tudor Ambarus | mtd: spi-nor: Trim what is exposed in spi-nor.h Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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2020-03-17 | Tudor Ambarus | mtd: spi-nor: Drop the MFR definitions Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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