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Merge branch 'v5.4/dt' into v5.4/drivers
2019-08-26
Jerome Brunet
Merge branch 'v5.4/dt' into v5.4/drivers
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2019-08-26
Neil Armstrong
dt-bindings: clk: meson: add sm1 periph clock controller...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-08-20
Jerome Brunet
clk: meson: axg-audio: add g12a reset support
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-08-20
Jerome Brunet
Merge branch 'v5.4/dt' into v5.4/drivers
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2019-08-20
Jerome Brunet
dt-bindings: clock: meson: add resets to the audio...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-08-09
Jerome Brunet
Merge branch 'v5.4/dt' into v5.4/drivers
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2019-08-09
Neil Armstrong
clk: meson: g12a: expose CPUB clock ID for G12B
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-08-09
Neil Armstrong
clk: meson: g12a: add notifiers to handle cpu clock...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-08-09
Neil Armstrong
clk: meson: add g12a cpu dynamic divider driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-08-09
Neil Armstrong
clk: core: introduce clk_hw_set_parent()
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: remove clk input helper
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: remove ee input bypass clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: clk-regmap: migrate to new parent description...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: meson8b: migrate to the new parent description...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: axg: migrate to the new parent description...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: gxbb: migrate to the new parent description...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: g12a: migrate to the new parent description...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: remove ao input bypass clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: axg-aoclk: migrate to the new parent description...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: gxbb-aoclk: migrate to the new parent descriptio...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: g12a-aoclk: migrate to the new parent descriptio...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-29
Alexandre Mergnat
clk: meson: axg-audio: migrate to the new parent description...
[
jbrunet@baylibre.com
: remove CLK_SET_RATE_PARENT from...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-07-25
Alexandre Mergnat
clk: meson: g12a: fix hifi typo in mali parent_names
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-06-11
Neil Armstrong
clk: meson: g12a: mark fclk_div3 as critical
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-06-11
Neil Armstrong
clk: meson: g12a: Add support for G12B CPUB clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-06-11
Jerome Brunet
Merge branch 'v5.3/dt' into v5.3/drivers
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2019-06-11
Neil Armstrong
dt-bindings: clk: meson: add g12b periph clock controller...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-06-11
Guillaume La Roque
clk: meson-g12a: add temperature sensor clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
> [fixed commit description]
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2019-06-11
Jerome Brunet
Merge branch 'v5.3/dt' into v5.3/drivers
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2019-06-11
Guillaume La Roque
dt-bindings: clk: g12a-clkc: add Temperature Sensor...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
> [fixed commit message]
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2019-06-11
Martin Blumenstingl
clk: meson: meson8b: add the cts_i958 clock
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-06-11
Martin Blumenstingl
clk: meson: meson8b: add the cts_mclk_i958 clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-06-11
Martin Blumenstingl
clk: meson: meson8b: add the cts_amclk clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-06-11
Jerome Brunet
Merge branch 'v5.3/dt' into v5.3/drivers
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2019-06-11
Martin Blumenstingl
dt-bindings: clock: meson8b: add the audio clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Jerome Brunet
clk: meson: g12a: add controller register init
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Jerome Brunet
clk: meson: eeclk: add init regs
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Jerome Brunet
clk: meson: g12a: add mpll register init sequences
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Jerome Brunet
clk: meson: mpll: add init callback and regs
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Jerome Brunet
clk: meson: axg: spread spectrum is on mpll2
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Jerome Brunet
clk: meson: gxbb: no spread spectrum on mpll0
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Jerome Brunet
clk: meson: mpll: properly handle spread spectrum
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Martin Blumenstingl
clk: meson: meson8b: fix a typo in the VPU parent names...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2019-05-20
Jerome Brunet
clk: meson: fix MPLL 50M binding id typo
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-09-26
Martin Blumenstingl
clk: meson: meson8b: use the regmap in the internal...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-09-26
Martin Blumenstingl
clk: meson: meson8b: register the clock controller...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-09-26
Yixun Lan
clk: meson-axg: pcie: drop the mpll3 clock parent
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-09-26
Jerome Brunet
clk: meson: axg: round audio system master clocks down
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-09-26
Jerome Brunet
clk: meson: clk-pll: drop hard-coded rates from pll...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-09-26
Jerome Brunet
clk: meson: clk-pll: remove od parameters
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-09-26
Jerome Brunet
clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-09-26
Jerome Brunet
clk: meson: clk-pll: add enable bit
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: add gen_clk
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Yixun Lan
clk: meson-axg: add clocks required by pcie driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: remove unused clk-audio-divider driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: stop rate propagation for audio clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: axg: add the audio clock controller driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: add axg audio sclk divider driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
Merge remote-tracking branch 'clk/clk-core-duty-cycle...
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2018-07-09
Jerome Brunet
clk: meson: add triple phase clock driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: add clk-phase clock driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
Merge branch 'next/dt' into next/drivers
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2018-07-09
Jerome Brunet
clk: meson: clean-up meson clock configuration
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: remove obsolete register access
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-09
Jerome Brunet
clk: meson: expose GEN_CLK clkid
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-07-03
Yixun Lan
clk: meson-axg: add pcie and mipi clock bindings
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-06-22
Jerome Brunet
dt-bindings: clock: add meson axg audio clock controller...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-06-21
Jerome Brunet
clk: meson: audio-divider is one based
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-06-19
Neil Armstrong
clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-21
Jerome Brunet
clk: meson: axg: let mpll clocks round closest
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-21
Jerome Brunet
clk: meson: mpll: add round closest support
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-21
Martin Blumenstingl
clk: meson: meson8b: mark fclk_div2 gate clocks as...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-18
Jerome Brunet
clk: meson: use SPDX license identifiers consistently
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-15
Yixun Lan
clk: meson: drop CLK_SET_RATE_PARENT flag
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-15
Qiufang Dai
clk: meson-axg: Add AO Clock and Reset controller driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-15
Yixun Lan
clk: meson: aoclk: refactor common code into dedicated...
Suggested-by: Jerome Brunet <
jbrunet@baylibre.com
>
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-15
Jerome Brunet
Merge branch 'next/bindings' into next/drivers
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2018-05-15
Yixun Lan
clk: meson: migrate to devm_of_clk_add_hw_provider API
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-15
Maxime Jourdan
clk: meson: gxbb: add the video decoder clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-15
Martin Blumenstingl
clk: meson: meson8b: add support for the NAND clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-15
Yixun Lan
dt-bindings: clock: reset: Add AXG AO Clock and Reset...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-05-15
Yixun Lan
dt-bindings: clock: axg-aoclkc: New binding for Meson...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-04-25
Maxime Jourdan
clk: meson: gxbb: expose VDEC_1 and VDEC_HEVC clocks
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-04-25
Martin Blumenstingl
dt-bindings: clock: meson8b: export the NAND clock
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-04-25
Martin Blumenstingl
clk: meson: meson8b: fix meson8b_cpu_clk parent clock...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-04-25
Martin Blumenstingl
clk: meson: meson8b: fix meson8b_fclk_div3_div clock...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-04-25
Yixun Lan
clk: meson: drop meson_aoclk_gate_regmap_ops
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: add axg misc bit to the mpll driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Yixun Lan
clk: meson: axg: fix the od shift of the sys_pll
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: axg: add the fractional part of the fixed_pll
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: gxbb: add the fractional part of the fixed_pll
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: fix rate calculation of plls with a fractional...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: add the gxl hdmi pll
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: add od3 to the pll driver
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: use the frac parameter width instead of...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: remove unnecessary rounding in the pll...
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: remove useless pll rate params tables
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2018-02-12
Jerome Brunet
clk: meson: check pll rate param table before using it
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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2017-12-23
Martin Blumenstingl
clk: meson: mpll: use 64-bit maths in params_from_rate
Signed-off-by: Jerome Brunet <
jbrunet@baylibre.com
>
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