review.tizen.org Git - platform/kernel/linux-starfive.git/search

projects / platform / kernel / linux-starfive.git / search

2019-04-09	Anup Patel	RISC-V: Add separate defconfig for 32bit systems Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-29	Joe Perches	RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW) Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-29	Anup Patel	RISC-V: Fix FIXMAP_TOP to avoid overlap with VMALLOC... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-27	Anup Patel	RISC-V: Always compile mm/init.c with cmodel=medany... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-27	Alan Kao	riscv: fix accessing 8-byte variable from RV32 Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-04	Palmer Dabbelt	RISC-V: Fixmap support and MM cleanups	commit \| commitdiff \| tree
2019-03-04	Andreas Schwab	arch: riscv: fix logic error in parse_dtb Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-04	Atish Patra	RISC-V: Assign hwcap as per comman capabilities. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-04	Atish Patra	RISC-V: Compare cpuid with NR_CPUS before mapping. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-04	Atish Patra	RISC-V: Allow hartid-to-cpuid function to fail. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-04	Atish Patra	RISC-V: Remove NR_CPUs check during hartid search from DT Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-04	Atish Patra	RISC-V: Move cpuid to hartid mapping to SMP. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-03-04	Atish Patra	RISC-V: Do not wait indefinitely in __cpu_up Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-02-19	Christoph Hellwig	riscv: remove the HAVE_KPROBES option Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-02-11	Johan Hovold	riscv: use for_each_of_cpu_node iterator Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-02-11	Johan Hovold	riscv: treat cpu devicetree nodes without status as... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-02-11	Johan Hovold	riscv: fix riscv_of_processor_hartid() comment Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-02-11	Johan Hovold	riscv: use pr_info and friends Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-02-11	Johan Hovold	riscv: add missing newlines to printk messages Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-02-11	Palmer Dabbelt	Revert "RISC-V: Make BSS section as the last section... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-02-11	Stefan O'Rear	riscv: Add pte bit to distinguish swap from invalid Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-25	Alexandre Ghiti	riscv: Adjust mmap base address at a third of task... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-24	Guo Ren	riscv: fixup max_low_pfn with PFN_DOWN. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-23	Andreas Schwab	tty/serial: use uart_console_write in the RISC-V SBL... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-23	Palmer Dabbelt	RISC-V: defconfig: Add CRYPTO_DEV_VIRTIO=y Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-23	Alistair Francis	RISC-V: defconfig: Enable Generic PCIE by default Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-23	Palmer Dabbelt	RISC-V: defconfig: Move CONFIG_PCI{,E_XILINX} Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-23	Antony Pavlov	RISC-V: Kconfig: fix spelling mistake "traget" -> ... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-23	Antony Pavlov	RISC-V: asm/page.h: fix spelling mistake "CONFIG_64BITS... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-23	Andreas Schwab	RISC-V: fix bad use of of_node_put Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-23	Vincent Chen	RISC-V: Add _TIF_NEED_RESCHED check for kernel thread... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-09	Anup Patel	tty/serial: Add RISC-V SBI earlycon support Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	Palmer Dabbelt	Fix a handful of audit-related issue	commit \| commitdiff \| tree
2019-01-07	David Abdurachmanov	riscv: add HAVE_SYSCALL_TRACEPOINTS to Kconfig Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	David Abdurachmanov	riscv: fix trace_sys_exit hook Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	David Abdurachmanov	riscv: define CREATE_TRACE_POINTS in ptrace.c Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	David Abdurachmanov	riscv: define NR_syscalls in unistd.h Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	David Abdurachmanov	riscv: audit: add audit hook in do_syscall_trace_enter... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	David Abdurachmanov	riscv: add audit support Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	Zong Li	RISC-V: Support MODULE_SECTIONS mechanism on RV32 Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	Paul Walmsley	MAINTAINERS: SiFive drivers: add myself as a SiFive... Cc: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	Paul Walmsley	MAINTAINERS: SiFive drivers: change the git tree to... Cc: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	Andreas Schwab	riscv: don't stop itself in smp_send_stop Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	Paul Walmsley	arch: riscv: support kernel command line forcing when... Cc: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	Aurelien Jarno	tools uapi: fix RISC-V 64-bit support Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2019-01-07	Anup Patel	RISC-V: Make BSS section as the last section in vmlinux... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-21	Anup Patel	RISC-V: Select GENERIC_SCHED_CLOCK for clocksource... Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-21	Olof Johansson	RISC-V: lib: minor asm cleanup Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-21	Palmer Dabbelt	RISC-V: Move from EARLY_PRINTK to SBI earlycon	commit \| commitdiff \| tree
2018-12-21	Nick Kossifidis	RISC-V: Update Kconfig to better handle CMDLINE Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-21	David Abdurachmanov	riscv: remove unused variable in ftrace Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-21	Yangtao Li	RISC-V: add of_node_put() Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-21	Atish Patra	RISC-V: Fix of_node_* refcount Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-21	Andrea Parri	riscv, atomic: Add #define's for the atomic_{cmp,}xchg_... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-17	Anup Patel	RISC-V: Remove EARLY_PRINTK support Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-12-17	Anup Patel	RISC-V: defconfig: Enable RISC-V SBI earlycon support Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-20	Patrick Stählin	RISC-V: recognize S/U mode bits in print_isa Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-20	David Abdurachmanov	riscv: add asm/unistd.h UAPI header Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-20	David Abdurachmanov	riscv: fix warning in arch/riscv/include/asm/module.h Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-20	Anup Patel	RISC-V: Build flat and compressed kernel images Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-20	Olof Johansson	RISC-V: Fix raw_copy_{to,from}_user() Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-13	Olof Johansson	RISC-V: Silence some module warnings on 32-bit Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-13	Olof Johansson	RISC-V: lib: Fix build error for 64-bit Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-13	David Abdurachmanov	riscv: add missing vdso_install target Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-13	David Abdurachmanov	riscv: fix spacing in struct pt_regs Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-13	Anup Patel	RISC-V: defconfig: Enable printk timestamps Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-11-02	Anup Patel	RISC-V: refresh defconfig Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-31	Palmer Dabbelt	lib: Remove umoddi3 and udivmoddi4 Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-31	Palmer Dabbelt	Move EM_RISCV into elf-em.h Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-31	Andreas Schwab	RISC-V: properly determine hardware caps Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-31	Palmer Dabbelt	Revert "lib: Add umoddi3 and udivmoddi4 of GCC library... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-31	Palmer Dabbelt	Revert "RISC-V: Select GENERIC_LIB_UMODDI3 on RV32" Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: SMP cleanup and new features Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Fix some RV32 bugs and build failures Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	riscv: Add support to no-FPU systems Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Nick Kossifidis	RISC-V: Cosmetic menuconfig changes Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Masahiro Yamada	riscv: move GCC version check for ARCH_SUPPORTS_INT128... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Christoph Hellwig	RISC-V: remove the unused return_to_handler export Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Jim Wilson	RISC-V: Add futex support. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Jim Wilson	RISC-V: Add FP register ptrace support for gdb. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Mask out the F extension on systems without D Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Don't set cacheinfo.{physical_line_partition... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Anup Patel	RISC-V: Show IPI stats Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Anup Patel	RISC-V: Show CPU ID and Hart ID separately in /proc... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Atish Patra	RISC-V: Use Linux logical CPU number instead of hartid Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Atish Patra	RISC-V: Add logical CPU indexing for RISC-V Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Atish Patra	RISC-V: Use WRITE_ONCE instead of direct access Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Use mmgrab() Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Rename riscv_of_processor_hart to riscv_of_processor... Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Provide a cleaner raw_smp_processor_id() Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Atish Patra	RISC-V: Disable preemption before enabling interrupts Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Comment on the TLB flush in smp_callin() Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Filter ISA and MMU values in cpuinfo Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Palmer Dabbelt	RISC-V: Don't set cacheinfo.{physical_line_partition... Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Anup Patel	RISC-V: No need to pass scause as arg to do_IRQ() Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Vincent Chen	RISC-V: Avoid corrupting the upper 32-bit of phys_addr_t... Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Zong Li	RISC-V: Select GENERIC_LIB_UMODDI3 on RV32 Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Zong Li	lib: Add umoddi3 and udivmoddi4 of GCC library routines Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
2018-10-23	Zong Li	RISC-V: Use swiotlb on RV64 only Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	commit \| commitdiff \| tree
next

Domain: System / Kernel;

RSS Atom